xref: /rk3399_ARM-atf/plat/qti/msm8916/aarch64/msm8916_helpers.S (revision dd9fae1ce0e7b985c9fe8f8f8ae358b8c166c6a9)
1/*
2 * Copyright (c) 2021-2023, Stephan Gerhold <stephan@gerhold.net>
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch.h>
8#include <asm_macros.S>
9
10#include <msm8916_mmap.h>
11
12#define APCS_TCM_START_ADDR	0x10
13#define APCS_TCM_REDIRECT_EN_0	BIT_32(0)
14
15	.globl	plat_crash_console_init
16	.globl	plat_crash_console_putc
17	.globl	plat_crash_console_flush
18	.globl	plat_panic_handler
19	.globl	plat_my_core_pos
20	.globl	plat_get_my_entrypoint
21	.globl	plat_reset_handler
22	.globl	platform_mem_init
23	.globl	msm8916_entry_point
24
25	/* -------------------------------------------------
26	 * int plat_crash_console_init(void)
27	 * Initialize the crash console.
28	 * Out: x0 - 1 on success, 0 on error
29	 * Clobber list : x0 - x4
30	 * -------------------------------------------------
31	 */
32func plat_crash_console_init
33	mov	x1, #BLSP_UART2_BASE
34	mov	x0, #1
35	b	console_uartdm_core_init
36endfunc plat_crash_console_init
37
38	/* -------------------------------------------------
39	 * int plat_crash_console_putc(int c)
40	 * Print a character on the crash console.
41	 * In : w0 - character to be printed
42	 * Out: w0 - printed character on success
43	 * Clobber list : x1, x2
44	 * -------------------------------------------------
45	 */
46func plat_crash_console_putc
47	mov	x1, #BLSP_UART2_BASE
48	b	console_uartdm_core_putc
49endfunc plat_crash_console_putc
50
51	/* -------------------------------------------------
52	 * void plat_crash_console_flush(void)
53	 * Force a write of all buffered data that has not
54	 * been output.
55	 * Clobber list : x1, x2
56	 * -------------------------------------------------
57	 */
58func plat_crash_console_flush
59	mov	x1, #BLSP_UART2_BASE
60	b	console_uartdm_core_flush
61endfunc plat_crash_console_flush
62
63	/* -------------------------------------------------
64	 * void plat_panic_handler(void) __dead
65	 * Called when an unrecoverable error occurs.
66	 * -------------------------------------------------
67	 */
68func plat_panic_handler
69	/* Try to shutdown/reset */
70	mov_imm	x0, MPM_PS_HOLD
71	str	wzr, [x0]
721:	b	1b
73endfunc plat_panic_handler
74
75	/* -------------------------------------------------
76	 * unsigned int plat_my_core_pos(void)
77	 * Out: x0 - index of the calling CPU
78	 * -------------------------------------------------
79	 */
80func plat_my_core_pos
81	/* There is just a single cluster so this is very simple */
82	mrs	x0, mpidr_el1
83	and	x0, x0, #MPIDR_CPU_MASK
84	ret
85endfunc plat_my_core_pos
86
87	/* -------------------------------------------------
88	 * uintptr_t plat_get_my_entrypoint(void)
89	 * Distinguish cold and warm boot and return warm boot
90	 * entry address if available.
91	 * Out: x0 - warm boot entry point or 0 on cold boot
92	 * -------------------------------------------------
93	 */
94func plat_get_my_entrypoint
95	ldr	x0, msm8916_entry_point
96	ret
97endfunc plat_get_my_entrypoint
98
99	/* -------------------------------------------------
100	 * void plat_reset_handler(void)
101	 * Perform additional initialization after reset.
102	 * Clobber list : x0 - x18, x30
103	 * -------------------------------------------------
104	 */
105func plat_reset_handler
106	/*
107	 * Check if the CPU is running at the correct address.
108	 * During cold boot the CPU enters here at the wrong address
109	 * using the "boot remapper". (It remaps the BL31_BASE to
110	 * the CPU reset address 0x0).
111	 */
112	mov	x0, #BL31_BASE
113	adr	x1, bl31_entrypoint
114	cmp	x0, x1
115	b.ne	_remapped_cold_boot
116	/* Already running at correct address, just return directly */
117	ret
118
119_remapped_cold_boot:
120	/*
121	 * The previous boot stage seems to use the L2 cache as TCM.
122	 * Disable the TCM redirect before enabling caches to avoid
123	 * strange crashes.
124	 */
125	mov	x2, #APCS_CFG
126	ldr	w3, [x2, #APCS_TCM_START_ADDR]
127	and	w3, w3, #~APCS_TCM_REDIRECT_EN_0
128	str	w3, [x2, #APCS_TCM_START_ADDR]
129
130	/* Enter BL31 again at the real address */
131	br	x0
132endfunc plat_reset_handler
133
134	/* -------------------------------------------------
135	 * void platform_mem_init(void)
136	 * Performs additional memory initialization early
137	 * in the boot process.
138	 * -------------------------------------------------
139	 */
140func platform_mem_init
141	/* Nothing to do here, all memory is already initialized */
142	ret
143endfunc platform_mem_init
144
145	.data
146	.align	3
147
148	/* -------------------------------------------------
149	 * Warm boot entry point for CPU. Set by PSCI code.
150	 * -------------------------------------------------
151	 */
152msm8916_entry_point:
153	.quad	0
154