1 /* 2 * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <platform_def.h> 8 9 #include <arch_helpers.h> 10 #include <common/bl_common.h> 11 #include <lib/xlat_tables/xlat_tables_v2.h> 12 13 #include "qemu_private.h" 14 15 #define MAP_DEVICE0 MAP_REGION_FLAT(DEVICE0_BASE, \ 16 DEVICE0_SIZE, \ 17 MT_DEVICE | MT_RW | MT_SECURE) 18 19 #ifdef DEVICE1_BASE 20 #define MAP_DEVICE1 MAP_REGION_FLAT(DEVICE1_BASE, \ 21 DEVICE1_SIZE, \ 22 MT_DEVICE | MT_RW | MT_SECURE) 23 #endif 24 25 #ifdef DEVICE2_BASE 26 #define MAP_DEVICE2 MAP_REGION_FLAT(DEVICE2_BASE, \ 27 DEVICE2_SIZE, \ 28 MT_DEVICE | MT_RO | MT_SECURE) 29 #endif 30 31 #define MAP_SHARED_RAM MAP_REGION_FLAT(SHARED_RAM_BASE, \ 32 SHARED_RAM_SIZE, \ 33 MT_DEVICE | MT_RW | MT_SECURE) 34 35 #define MAP_BL32_MEM MAP_REGION_FLAT(BL32_MEM_BASE, BL32_MEM_SIZE, \ 36 MT_MEMORY | MT_RW | MT_SECURE) 37 38 #define MAP_NS_DRAM0 MAP_REGION_FLAT(NS_DRAM0_BASE, NS_DRAM0_SIZE, \ 39 MT_MEMORY | MT_RW | MT_NS) 40 41 #define MAP_FLASH0 MAP_REGION_FLAT(QEMU_FLASH0_BASE, QEMU_FLASH0_SIZE, \ 42 MT_MEMORY | MT_RO | MT_SECURE) 43 44 #define MAP_FLASH1 MAP_REGION_FLAT(QEMU_FLASH1_BASE, QEMU_FLASH1_SIZE, \ 45 MT_MEMORY | MT_RO | MT_SECURE) 46 47 /* 48 * Table of regions for various BL stages to map using the MMU. 49 * This doesn't include TZRAM as the 'mem_layout' argument passed to 50 * arm_configure_mmu_elx() will give the available subset of that, 51 */ 52 #ifdef IMAGE_BL1 53 static const mmap_region_t plat_qemu_mmap[] = { 54 MAP_FLASH0, 55 MAP_FLASH1, 56 MAP_SHARED_RAM, 57 MAP_DEVICE0, 58 #ifdef MAP_DEVICE1 59 MAP_DEVICE1, 60 #endif 61 #ifdef MAP_DEVICE2 62 MAP_DEVICE2, 63 #endif 64 {0} 65 }; 66 #endif 67 #ifdef IMAGE_BL2 68 static const mmap_region_t plat_qemu_mmap[] = { 69 MAP_FLASH0, 70 MAP_FLASH1, 71 MAP_SHARED_RAM, 72 MAP_DEVICE0, 73 #ifdef MAP_DEVICE1 74 MAP_DEVICE1, 75 #endif 76 #ifdef MAP_DEVICE2 77 MAP_DEVICE2, 78 #endif 79 MAP_NS_DRAM0, 80 MAP_BL32_MEM, 81 {0} 82 }; 83 #endif 84 #ifdef IMAGE_BL31 85 static const mmap_region_t plat_qemu_mmap[] = { 86 MAP_SHARED_RAM, 87 MAP_DEVICE0, 88 #ifdef MAP_DEVICE1 89 MAP_DEVICE1, 90 #endif 91 MAP_BL32_MEM, 92 {0} 93 }; 94 #endif 95 #ifdef IMAGE_BL32 96 static const mmap_region_t plat_qemu_mmap[] = { 97 MAP_SHARED_RAM, 98 MAP_DEVICE0, 99 #ifdef MAP_DEVICE1 100 MAP_DEVICE1, 101 #endif 102 {0} 103 }; 104 #endif 105 106 /******************************************************************************* 107 * Macro generating the code for the function setting up the pagetables as per 108 * the platform memory map & initialize the mmu, for the given exception level 109 ******************************************************************************/ 110 111 #define DEFINE_CONFIGURE_MMU_EL(_el) \ 112 void qemu_configure_mmu_##_el(unsigned long total_base, \ 113 unsigned long total_size, \ 114 unsigned long code_start, \ 115 unsigned long code_limit, \ 116 unsigned long ro_start, \ 117 unsigned long ro_limit, \ 118 unsigned long coh_start, \ 119 unsigned long coh_limit) \ 120 { \ 121 mmap_add_region(total_base, total_base, \ 122 total_size, \ 123 MT_MEMORY | MT_RW | MT_SECURE); \ 124 mmap_add_region(code_start, code_start, \ 125 code_limit - code_start, \ 126 MT_CODE | MT_SECURE); \ 127 mmap_add_region(ro_start, ro_start, \ 128 ro_limit - ro_start, \ 129 MT_RO_DATA | MT_SECURE); \ 130 mmap_add_region(coh_start, coh_start, \ 131 coh_limit - coh_start, \ 132 MT_DEVICE | MT_RW | MT_SECURE); \ 133 mmap_add(plat_qemu_mmap); \ 134 init_xlat_tables(); \ 135 \ 136 enable_mmu_##_el(0); \ 137 } 138 139 /* Define EL1 and EL3 variants of the function initialising the MMU */ 140 #ifdef __aarch64__ 141 DEFINE_CONFIGURE_MMU_EL(el1) 142 DEFINE_CONFIGURE_MMU_EL(el3) 143 #else 144 DEFINE_CONFIGURE_MMU_EL(svc_mon) 145 #endif 146 147 148