1*87056d31SPankaj Gupta/* 2*87056d31SPankaj Gupta * Copyright 2018-2020 NXP 3*87056d31SPankaj Gupta * 4*87056d31SPankaj Gupta * SPDX-License-Identifier: BSD-3-Clause 5*87056d31SPankaj Gupta * 6*87056d31SPankaj Gupta */ 7*87056d31SPankaj Gupta 8*87056d31SPankaj Gupta#include <arch.h> 9*87056d31SPankaj Gupta#include <asm_macros.S> 10*87056d31SPankaj Gupta 11*87056d31SPankaj Gupta#include <platform_def.h> 12*87056d31SPankaj Gupta 13*87056d31SPankaj Gupta.globl plat_secondary_cold_boot_setup 14*87056d31SPankaj Gupta.globl plat_is_my_cpu_primary 15*87056d31SPankaj Gupta.globl plat_reset_handler 16*87056d31SPankaj Gupta.globl platform_mem_init 17*87056d31SPankaj Gupta 18*87056d31SPankaj Gupta 19*87056d31SPankaj Guptafunc platform_mem1_init 20*87056d31SPankaj Gupta ret 21*87056d31SPankaj Guptaendfunc platform_mem1_init 22*87056d31SPankaj Gupta 23*87056d31SPankaj Gupta 24*87056d31SPankaj Guptafunc platform_mem_init 25*87056d31SPankaj Gupta ret 26*87056d31SPankaj Guptaendfunc platform_mem_init 27*87056d31SPankaj Gupta 28*87056d31SPankaj Gupta 29*87056d31SPankaj Guptafunc apply_platform_errata 30*87056d31SPankaj Gupta 31*87056d31SPankaj Gupta ret 32*87056d31SPankaj Guptaendfunc apply_platform_errata 33*87056d31SPankaj Gupta 34*87056d31SPankaj Gupta 35*87056d31SPankaj Guptafunc plat_reset_handler 36*87056d31SPankaj Gupta mov x29, x30 37*87056d31SPankaj Gupta bl apply_platform_errata 38*87056d31SPankaj Gupta 39*87056d31SPankaj Gupta#if defined(IMAGE_BL31) 40*87056d31SPankaj Gupta ldr x0, =POLICY_SMMU_PAGESZ_64K 41*87056d31SPankaj Gupta cbz x0, 1f 42*87056d31SPankaj Gupta /* Set the SMMU page size in the sACR register */ 43*87056d31SPankaj Gupta bl _set_smmu_pagesz_64 44*87056d31SPankaj Gupta#endif 45*87056d31SPankaj Gupta1: 46*87056d31SPankaj Gupta mov x30, x29 47*87056d31SPankaj Gupta 48*87056d31SPankaj Gupta ret 49*87056d31SPankaj Guptaendfunc plat_reset_handler 50*87056d31SPankaj Gupta 51*87056d31SPankaj Gupta 52*87056d31SPankaj Gupta/* void plat_secondary_cold_boot_setup (void); 53*87056d31SPankaj Gupta * 54*87056d31SPankaj Gupta * This function performs any platform specific actions 55*87056d31SPankaj Gupta * needed for a secondary cpu after a cold reset e.g 56*87056d31SPankaj Gupta * mark the cpu's presence, mechanism to place it in a 57*87056d31SPankaj Gupta * holding pen etc. 58*87056d31SPankaj Gupta */ 59*87056d31SPankaj Guptafunc plat_secondary_cold_boot_setup 60*87056d31SPankaj Gupta /* lx2160a does not do cold boot for secondary CPU */ 61*87056d31SPankaj Guptacb_panic: 62*87056d31SPankaj Gupta b cb_panic 63*87056d31SPankaj Guptaendfunc plat_secondary_cold_boot_setup 64*87056d31SPankaj Gupta 65*87056d31SPankaj Gupta 66*87056d31SPankaj Gupta/* unsigned int plat_is_my_cpu_primary (void); 67*87056d31SPankaj Gupta * 68*87056d31SPankaj Gupta * Find out whether the current cpu is the primary 69*87056d31SPankaj Gupta * cpu. 70*87056d31SPankaj Gupta */ 71*87056d31SPankaj Guptafunc plat_is_my_cpu_primary 72*87056d31SPankaj Gupta mrs x0, mpidr_el1 73*87056d31SPankaj Gupta and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK) 74*87056d31SPankaj Gupta cmp x0, 0x0 75*87056d31SPankaj Gupta cset w0, eq 76*87056d31SPankaj Gupta ret 77*87056d31SPankaj Guptaendfunc plat_is_my_cpu_primary 78