xref: /rk3399_ARM-atf/plat/nxp/soc-lx2160a/aarch64/lx2160a_helpers.S (revision 36b998d75bea3fab391acdb51732cd7a5f2a89a4)
1/*
2 * Copyright 2018-2020 NXP
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 *
6 */
7
8#include <arch.h>
9#include <asm_macros.S>
10#include <cpu_macros.S>
11
12#include <platform_def.h>
13
14.globl	plat_secondary_cold_boot_setup
15.globl	plat_is_my_cpu_primary
16.globl	plat_reset_handler
17.globl  platform_mem_init
18
19
20func platform_mem1_init
21	ret
22endfunc platform_mem1_init
23
24
25func platform_mem_init
26	ret
27endfunc	platform_mem_init
28
29
30func apply_platform_errata
31
32	ret
33endfunc apply_platform_errata
34
35
36func plat_reset_handler
37	mov x29, x30
38	bl  apply_platform_errata
39
40	sysreg_bit_set CORTEX_A72_CPUACTLR_EL1, CORTEX_A72_CPUACTLR_EL1_DELAY_EXCLUSIVE_SNOOP
41
42#if defined(IMAGE_BL31)
43	ldr x0, =POLICY_SMMU_PAGESZ_64K
44	cbz x0, 1f
45	/* Set the SMMU page size in the sACR register */
46	bl _set_smmu_pagesz_64
47#endif
481:
49	mov x30, x29
50
51	ret
52endfunc plat_reset_handler
53
54
55/* void plat_secondary_cold_boot_setup (void);
56 *
57 * This function performs any platform specific actions
58 * needed for a secondary cpu after a cold reset e.g
59 * mark the cpu's presence, mechanism to place it in a
60 * holding pen etc.
61 */
62func plat_secondary_cold_boot_setup
63	/* lx2160a does not do cold boot for secondary CPU */
64cb_panic:
65	b	cb_panic
66endfunc plat_secondary_cold_boot_setup
67
68
69/* unsigned int plat_is_my_cpu_primary (void);
70 *
71 * Find out whether the current cpu is the primary
72 * cpu.
73 */
74func plat_is_my_cpu_primary
75	mrs	x0, mpidr_el1
76	and	x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
77	cmp	x0, 0x0
78	cset	w0, eq
79	ret
80endfunc plat_is_my_cpu_primary
81