1# 2# Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are met: 6# 7# Redistributions of source code must retain the above copyright notice, this 8# list of conditions and the following disclaimer. 9# 10# Redistributions in binary form must reproduce the above copyright notice, 11# this list of conditions and the following disclaimer in the documentation 12# and/or other materials provided with the distribution. 13# 14# Neither the name of ARM nor the names of its contributors may be used 15# to endorse or promote products derived from this software without specific 16# prior written permission. 17# 18# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28# POSSIBILITY OF SUCH DAMAGE. 29# 30 31SOC_DIR := plat/nvidia/tegra/soc/${TARGET_SOC} 32 33# enable ASM_ASSERTION for the build 34ASM_ASSERTION := 1 35$(eval $(call add_define,ASM_ASSERTION)) 36 37# dump the state on crash console 38CRASH_REPORTING := 1 39$(eval $(call add_define,CRASH_REPORTING)) 40 41# Disable the PSCI platform compatibility layer 42ENABLE_PLAT_COMPAT := 0 43 44# enable dynamic memory mapping 45PLAT_XLAT_TABLES_DYNAMIC := 1 46$(eval $(call add_define,PLAT_XLAT_TABLES_DYNAMIC)) 47 48# Enable PSCI v1.0 extended state ID format 49PSCI_EXTENDED_STATE_ID := 1 50 51# code and read-only data should be put on separate memory pages 52SEPARATE_CODE_AND_RODATA := 1 53 54# do not use coherent memory 55USE_COHERENT_MEM := 0 56 57include plat/nvidia/tegra/common/tegra_common.mk 58include ${SOC_DIR}/platform_${TARGET_SOC}.mk 59 60# modify BUILD_PLAT to point to SoC specific build directory 61BUILD_PLAT := ${BUILD_BASE}/${PLAT}/${TARGET_SOC}/${BUILD_TYPE} 62