108438e24SVarun Wadekar# 21f38d3c9SVarun Wadekar# Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. 308438e24SVarun Wadekar# 482cb2c1aSdp-arm# SPDX-License-Identifier: BSD-3-Clause 508438e24SVarun Wadekar# 608438e24SVarun Wadekar 708438e24SVarun WadekarSOC_DIR := plat/nvidia/tegra/soc/${TARGET_SOC} 871cb26eaSVarun Wadekar 903af25bcSVarun Wadekar# dump the state on crash console 1003af25bcSVarun WadekarCRASH_REPORTING := 1 1103af25bcSVarun Wadekar$(eval $(call add_define,CRASH_REPORTING)) 12990c1e01SVarun Wadekar 136c16918fSVarun Wadekar# enable assert() for release/debug builds 146c16918fSVarun WadekarENABLE_ASSERTIONS := 1 15db0d1070SVarun WadekarPLAT_LOG_LEVEL_ASSERT := 40 16db0d1070SVarun Wadekar$(eval $(call add_define,PLAT_LOG_LEVEL_ASSERT)) 176c16918fSVarun Wadekar 1803af25bcSVarun Wadekar# enable dynamic memory mapping 1903af25bcSVarun WadekarPLAT_XLAT_TABLES_DYNAMIC := 1 2003af25bcSVarun Wadekar$(eval $(call add_define,PLAT_XLAT_TABLES_DYNAMIC)) 2103af25bcSVarun Wadekar 2203af25bcSVarun Wadekar# Enable PSCI v1.0 extended state ID format 2303af25bcSVarun WadekarPSCI_EXTENDED_STATE_ID := 1 2403af25bcSVarun Wadekar 2503af25bcSVarun Wadekar# code and read-only data should be put on separate memory pages 2603af25bcSVarun WadekarSEPARATE_CODE_AND_RODATA := 1 2703af25bcSVarun Wadekar 2803af25bcSVarun Wadekar# do not use coherent memory 2903af25bcSVarun WadekarUSE_COHERENT_MEM := 0 3003af25bcSVarun Wadekar 313872fc2dSDavid Cunado# do not enable SVE 323872fc2dSDavid CunadoENABLE_SVE_FOR_NS := 0 333872fc2dSDavid Cunado 34*fda818c9SVarun Wadekar# enable D-cache early during CPU warmboot 35*fda818c9SVarun WadekarWARMBOOT_ENABLE_DCACHE_EARLY := 1 36*fda818c9SVarun Wadekar 3708438e24SVarun Wadekarinclude plat/nvidia/tegra/common/tegra_common.mk 3808438e24SVarun Wadekarinclude ${SOC_DIR}/platform_${TARGET_SOC}.mk 391f95e28cSVarun Wadekar 401f95e28cSVarun Wadekar# modify BUILD_PLAT to point to SoC specific build directory 411f95e28cSVarun WadekarBUILD_PLAT := ${BUILD_BASE}/${PLAT}/${TARGET_SOC}/${BUILD_TYPE} 426311f63dSVarun Wadekar 436311f63dSVarun Wadekar# enable signed comparison checks 442ba62de5SDouglas RaillardTF_CFLAGS += -Wsign-compare 45