108438e24SVarun Wadekar# 21f38d3c9SVarun Wadekar# Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. 308438e24SVarun Wadekar# 408438e24SVarun Wadekar# Redistribution and use in source and binary forms, with or without 508438e24SVarun Wadekar# modification, are permitted provided that the following conditions are met: 608438e24SVarun Wadekar# 708438e24SVarun Wadekar# Redistributions of source code must retain the above copyright notice, this 808438e24SVarun Wadekar# list of conditions and the following disclaimer. 908438e24SVarun Wadekar# 1008438e24SVarun Wadekar# Redistributions in binary form must reproduce the above copyright notice, 1108438e24SVarun Wadekar# this list of conditions and the following disclaimer in the documentation 1208438e24SVarun Wadekar# and/or other materials provided with the distribution. 1308438e24SVarun Wadekar# 1408438e24SVarun Wadekar# Neither the name of ARM nor the names of its contributors may be used 1508438e24SVarun Wadekar# to endorse or promote products derived from this software without specific 1608438e24SVarun Wadekar# prior written permission. 1708438e24SVarun Wadekar# 1808438e24SVarun Wadekar# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 1908438e24SVarun Wadekar# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2008438e24SVarun Wadekar# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2108438e24SVarun Wadekar# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 2208438e24SVarun Wadekar# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 2308438e24SVarun Wadekar# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 2408438e24SVarun Wadekar# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 2508438e24SVarun Wadekar# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 2608438e24SVarun Wadekar# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 2708438e24SVarun Wadekar# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 2808438e24SVarun Wadekar# POSSIBILITY OF SUCH DAMAGE. 2908438e24SVarun Wadekar# 3008438e24SVarun Wadekar 3108438e24SVarun WadekarSOC_DIR := plat/nvidia/tegra/soc/${TARGET_SOC} 3271cb26eaSVarun Wadekar 33*03af25bcSVarun Wadekar# enable ASM_ASSERTION for the build 34*03af25bcSVarun WadekarASM_ASSERTION := 1 35*03af25bcSVarun Wadekar$(eval $(call add_define,ASM_ASSERTION)) 36*03af25bcSVarun Wadekar 37*03af25bcSVarun Wadekar# dump the state on crash console 38*03af25bcSVarun WadekarCRASH_REPORTING := 1 39*03af25bcSVarun Wadekar$(eval $(call add_define,CRASH_REPORTING)) 40990c1e01SVarun Wadekar 4171cb26eaSVarun Wadekar# Disable the PSCI platform compatibility layer 4271cb26eaSVarun WadekarENABLE_PLAT_COMPAT := 0 4308438e24SVarun Wadekar 44*03af25bcSVarun Wadekar# enable dynamic memory mapping 45*03af25bcSVarun WadekarPLAT_XLAT_TABLES_DYNAMIC := 1 46*03af25bcSVarun Wadekar$(eval $(call add_define,PLAT_XLAT_TABLES_DYNAMIC)) 47*03af25bcSVarun Wadekar 48*03af25bcSVarun Wadekar# Enable PSCI v1.0 extended state ID format 49*03af25bcSVarun WadekarPSCI_EXTENDED_STATE_ID := 1 50*03af25bcSVarun Wadekar 51*03af25bcSVarun Wadekar# code and read-only data should be put on separate memory pages 52*03af25bcSVarun WadekarSEPARATE_CODE_AND_RODATA := 1 53*03af25bcSVarun Wadekar 54*03af25bcSVarun Wadekar# do not use coherent memory 55*03af25bcSVarun WadekarUSE_COHERENT_MEM := 0 56*03af25bcSVarun Wadekar 5708438e24SVarun Wadekarinclude plat/nvidia/tegra/common/tegra_common.mk 5808438e24SVarun Wadekarinclude ${SOC_DIR}/platform_${TARGET_SOC}.mk 591f95e28cSVarun Wadekar 601f95e28cSVarun Wadekar# modify BUILD_PLAT to point to SoC specific build directory 611f95e28cSVarun WadekarBUILD_PLAT := ${BUILD_BASE}/${PLAT}/${TARGET_SOC}/${BUILD_TYPE} 62