xref: /rk3399_ARM-atf/plat/mediatek/mt8195/aarch64/platform_common.c (revision d336e093dd9ec917ce69484eae8914d98efa328d)
1174a1cfeSYidi Lin /*
2174a1cfeSYidi Lin  * Copyright (c) 2021, ARM Limited and Contributors. All rights reserved.
3174a1cfeSYidi Lin  *
4174a1cfeSYidi Lin  * SPDX-License-Identifier: BSD-3-Clause
5174a1cfeSYidi Lin  */
6174a1cfeSYidi Lin 
7174a1cfeSYidi Lin #include <lib/xlat_tables/xlat_tables_v2.h>
8174a1cfeSYidi Lin 
9174a1cfeSYidi Lin #include <platform_def.h>
10174a1cfeSYidi Lin 
11174a1cfeSYidi Lin /* Table of regions to map using the MMU.  */
12174a1cfeSYidi Lin const mmap_region_t plat_mmap[] = {
13174a1cfeSYidi Lin 	/* for TF text, RO, RW */
14174a1cfeSYidi Lin 	MAP_REGION_FLAT(MTK_DEV_RNG0_BASE, MTK_DEV_RNG0_SIZE,
15174a1cfeSYidi Lin 			MT_DEVICE | MT_RW | MT_SECURE),
16174a1cfeSYidi Lin 	MAP_REGION_FLAT(MTK_DEV_RNG2_BASE, MTK_DEV_RNG2_SIZE,
17174a1cfeSYidi Lin 			MT_DEVICE | MT_RW | MT_SECURE),
18*d336e093SEdward-JW Yang 	MAP_REGION_FLAT(MTK_MCDI_SRAM_BASE, MTK_MCDI_SRAM_MAP_SIZE,
19*d336e093SEdward-JW Yang 			MT_DEVICE | MT_RW | MT_SECURE),
207eb42237SRex-BC Chen 	MAP_REGION_FLAT(DP_SEC_BASE, DP_SEC_SIZE,
217eb42237SRex-BC Chen 			MT_DEVICE | MT_RW | MT_SECURE),
227eb42237SRex-BC Chen 	MAP_REGION_FLAT(eDP_SEC_BASE, eDP_SEC_SIZE,
237eb42237SRex-BC Chen 			MT_DEVICE | MT_RW | MT_SECURE),
24174a1cfeSYidi Lin 	{ 0 }
25174a1cfeSYidi Lin };
26174a1cfeSYidi Lin 
27174a1cfeSYidi Lin /*******************************************************************************
28174a1cfeSYidi Lin  * Macro generating the code for the function setting up the pagetables as per
29174a1cfeSYidi Lin  * the platform memory map & initialize the mmu, for the given exception level
30174a1cfeSYidi Lin  ******************************************************************************/
31174a1cfeSYidi Lin void plat_configure_mmu_el3(uintptr_t total_base,
32174a1cfeSYidi Lin 			    uintptr_t total_size,
33174a1cfeSYidi Lin 			    uintptr_t ro_start,
34174a1cfeSYidi Lin 			    uintptr_t ro_limit)
35174a1cfeSYidi Lin {
36174a1cfeSYidi Lin 	mmap_add_region(total_base, total_base, total_size,
37174a1cfeSYidi Lin 			MT_RW_DATA | MT_SECURE);
38174a1cfeSYidi Lin 	mmap_add_region(ro_start, ro_start, ro_limit - ro_start,
39174a1cfeSYidi Lin 			MT_CODE | MT_SECURE);
40174a1cfeSYidi Lin 	mmap_add(plat_mmap);
41174a1cfeSYidi Lin 	init_xlat_tables();
42174a1cfeSYidi Lin 	enable_mmu_el3(0);
43174a1cfeSYidi Lin }
44174a1cfeSYidi Lin 
45174a1cfeSYidi Lin unsigned int plat_get_syscnt_freq2(void)
46174a1cfeSYidi Lin {
47174a1cfeSYidi Lin 	return SYS_COUNTER_FREQ_IN_TICKS;
48174a1cfeSYidi Lin }
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