1*7d116dccSCC Ma# 2*7d116dccSCC Ma# Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. 3*7d116dccSCC Ma# 4*7d116dccSCC Ma# Redistribution and use in source and binary forms, with or without 5*7d116dccSCC Ma# modification, are permitted provided that the following conditions are met: 6*7d116dccSCC Ma# 7*7d116dccSCC Ma# Redistributions of source code must retain the above copyright notice, this 8*7d116dccSCC Ma# list of conditions and the following disclaimer. 9*7d116dccSCC Ma# 10*7d116dccSCC Ma# Redistributions in binary form must reproduce the above copyright notice, 11*7d116dccSCC Ma# this list of conditions and the following disclaimer in the documentation 12*7d116dccSCC Ma# and/or other materials provided with the distribution. 13*7d116dccSCC Ma# 14*7d116dccSCC Ma# Neither the name of ARM nor the names of its contributors may be used 15*7d116dccSCC Ma# to endorse or promote products derived from this software without specific 16*7d116dccSCC Ma# prior written permission. 17*7d116dccSCC Ma# 18*7d116dccSCC Ma# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19*7d116dccSCC Ma# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20*7d116dccSCC Ma# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21*7d116dccSCC Ma# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22*7d116dccSCC Ma# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23*7d116dccSCC Ma# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24*7d116dccSCC Ma# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25*7d116dccSCC Ma# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26*7d116dccSCC Ma# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27*7d116dccSCC Ma# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28*7d116dccSCC Ma# POSSIBILITY OF SUCH DAMAGE. 29*7d116dccSCC Ma# 30*7d116dccSCC Ma 31*7d116dccSCC MaMTK_PLAT := plat/mediatek 32*7d116dccSCC MaMTK_PLAT_SOC := ${MTK_PLAT}/${PLAT} 33*7d116dccSCC Ma 34*7d116dccSCC MaPLAT_INCLUDES := -I${MTK_PLAT}/common/ \ 35*7d116dccSCC Ma -I${MTK_PLAT_SOC}/ \ 36*7d116dccSCC Ma -I${MTK_PLAT_SOC}/drivers/gpio/ \ 37*7d116dccSCC Ma -I${MTK_PLAT_SOC}/drivers/mtcmos/ \ 38*7d116dccSCC Ma -I${MTK_PLAT_SOC}/drivers/pmic/ \ 39*7d116dccSCC Ma -I${MTK_PLAT_SOC}/drivers/rtc/ \ 40*7d116dccSCC Ma -I${MTK_PLAT_SOC}/drivers/spm/ \ 41*7d116dccSCC Ma -I${MTK_PLAT_SOC}/drivers/timer/ \ 42*7d116dccSCC Ma -I${MTK_PLAT_SOC}/drivers/uart/ \ 43*7d116dccSCC Ma -I${MTK_PLAT_SOC}/include/ 44*7d116dccSCC Ma 45*7d116dccSCC MaPLAT_BL_COMMON_SOURCES := lib/aarch64/xlat_tables.c \ 46*7d116dccSCC Ma plat/common/aarch64/plat_common.c \ 47*7d116dccSCC Ma plat/common/plat_gic.c 48*7d116dccSCC Ma 49*7d116dccSCC MaBL31_SOURCES += drivers/arm/cci/cci.c \ 50*7d116dccSCC Ma drivers/arm/gic/arm_gic.c \ 51*7d116dccSCC Ma drivers/arm/gic/gic_v2.c \ 52*7d116dccSCC Ma drivers/arm/gic/gic_v3.c \ 53*7d116dccSCC Ma drivers/console/console.S \ 54*7d116dccSCC Ma drivers/delay_timer/delay_timer.c \ 55*7d116dccSCC Ma lib/cpus/aarch64/aem_generic.S \ 56*7d116dccSCC Ma lib/cpus/aarch64/cortex_a53.S \ 57*7d116dccSCC Ma lib/cpus/aarch64/cortex_a57.S \ 58*7d116dccSCC Ma lib/cpus/aarch64/cortex_a72.S \ 59*7d116dccSCC Ma plat/common/aarch64/platform_mp_stack.S \ 60*7d116dccSCC Ma ${MTK_PLAT}/common/mtk_sip_svc.c \ 61*7d116dccSCC Ma ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \ 62*7d116dccSCC Ma ${MTK_PLAT_SOC}/aarch64/platform_common.c \ 63*7d116dccSCC Ma ${MTK_PLAT_SOC}/bl31_plat_setup.c \ 64*7d116dccSCC Ma ${MTK_PLAT_SOC}/drivers/gpio/gpio.c \ 65*7d116dccSCC Ma ${MTK_PLAT_SOC}/drivers/mtcmos/mtcmos.c \ 66*7d116dccSCC Ma ${MTK_PLAT_SOC}/drivers/pmic/pmic_wrap_init.c \ 67*7d116dccSCC Ma ${MTK_PLAT_SOC}/drivers/rtc/rtc.c \ 68*7d116dccSCC Ma ${MTK_PLAT_SOC}/drivers/spm/spm.c \ 69*7d116dccSCC Ma ${MTK_PLAT_SOC}/drivers/spm/spm_hotplug.c \ 70*7d116dccSCC Ma ${MTK_PLAT_SOC}/drivers/spm/spm_mcdi.c \ 71*7d116dccSCC Ma ${MTK_PLAT_SOC}/drivers/spm/spm_suspend.c \ 72*7d116dccSCC Ma ${MTK_PLAT_SOC}/drivers/timer/mt_cpuxgpt.c \ 73*7d116dccSCC Ma ${MTK_PLAT_SOC}/drivers/uart/8250_console.S \ 74*7d116dccSCC Ma ${MTK_PLAT_SOC}/plat_delay_timer.c \ 75*7d116dccSCC Ma ${MTK_PLAT_SOC}/plat_mt_gic.c \ 76*7d116dccSCC Ma ${MTK_PLAT_SOC}/plat_pm.c \ 77*7d116dccSCC Ma ${MTK_PLAT_SOC}/plat_sip_calls.c \ 78*7d116dccSCC Ma ${MTK_PLAT_SOC}/plat_topology.c \ 79*7d116dccSCC Ma ${MTK_PLAT_SOC}/power_tracer.c \ 80*7d116dccSCC Ma ${MTK_PLAT_SOC}/scu.c 81*7d116dccSCC Ma 82*7d116dccSCC Ma# Flag used by the MTK_platform port to determine the version of ARM GIC 83*7d116dccSCC Ma# architecture to use for interrupt management in EL3. 84*7d116dccSCC MaARM_GIC_ARCH := 2 85*7d116dccSCC Ma$(eval $(call add_define,ARM_GIC_ARCH)) 86*7d116dccSCC Ma 87*7d116dccSCC Ma# Enable workarounds for selected Cortex-A53 erratas. 88*7d116dccSCC MaERRATA_A53_826319 := 1 89*7d116dccSCC MaERRATA_A53_836870 := 1 90*7d116dccSCC Ma 91*7d116dccSCC Ma# indicate the reset vector address can be programmed 92*7d116dccSCC MaPROGRAMMABLE_RESET_ADDRESS := 1 93