17d116dccSCC Ma# 27d116dccSCC Ma# Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. 37d116dccSCC Ma# 47d116dccSCC Ma# Redistribution and use in source and binary forms, with or without 57d116dccSCC Ma# modification, are permitted provided that the following conditions are met: 67d116dccSCC Ma# 77d116dccSCC Ma# Redistributions of source code must retain the above copyright notice, this 87d116dccSCC Ma# list of conditions and the following disclaimer. 97d116dccSCC Ma# 107d116dccSCC Ma# Redistributions in binary form must reproduce the above copyright notice, 117d116dccSCC Ma# this list of conditions and the following disclaimer in the documentation 127d116dccSCC Ma# and/or other materials provided with the distribution. 137d116dccSCC Ma# 147d116dccSCC Ma# Neither the name of ARM nor the names of its contributors may be used 157d116dccSCC Ma# to endorse or promote products derived from this software without specific 167d116dccSCC Ma# prior written permission. 177d116dccSCC Ma# 187d116dccSCC Ma# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 197d116dccSCC Ma# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 207d116dccSCC Ma# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 217d116dccSCC Ma# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 227d116dccSCC Ma# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 237d116dccSCC Ma# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 247d116dccSCC Ma# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 257d116dccSCC Ma# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 267d116dccSCC Ma# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 277d116dccSCC Ma# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 287d116dccSCC Ma# POSSIBILITY OF SUCH DAMAGE. 297d116dccSCC Ma# 307d116dccSCC Ma 317d116dccSCC MaMTK_PLAT := plat/mediatek 327d116dccSCC MaMTK_PLAT_SOC := ${MTK_PLAT}/${PLAT} 337d116dccSCC Ma 347d116dccSCC MaPLAT_INCLUDES := -I${MTK_PLAT}/common/ \ 357ace1cc0SYi Zheng -I${MTK_PLAT_SOC}/drivers/crypt/ \ 367d116dccSCC Ma -I${MTK_PLAT_SOC}/drivers/mtcmos/ \ 377d116dccSCC Ma -I${MTK_PLAT_SOC}/drivers/pmic/ \ 387d116dccSCC Ma -I${MTK_PLAT_SOC}/drivers/rtc/ \ 397d116dccSCC Ma -I${MTK_PLAT_SOC}/drivers/spm/ \ 407d116dccSCC Ma -I${MTK_PLAT_SOC}/drivers/timer/ \ 417d116dccSCC Ma -I${MTK_PLAT_SOC}/drivers/uart/ \ 427d116dccSCC Ma -I${MTK_PLAT_SOC}/include/ 437d116dccSCC Ma 443e4b8fdcSSoby MathewPLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \ 453e4b8fdcSSoby Mathew lib/xlat_tables/aarch64/xlat_tables.c \ 467d116dccSCC Ma plat/common/aarch64/plat_common.c \ 477d116dccSCC Ma plat/common/plat_gic.c 487d116dccSCC Ma 497d116dccSCC MaBL31_SOURCES += drivers/arm/cci/cci.c \ 507d116dccSCC Ma drivers/arm/gic/arm_gic.c \ 517d116dccSCC Ma drivers/arm/gic/gic_v2.c \ 527d116dccSCC Ma drivers/arm/gic/gic_v3.c \ 537d116dccSCC Ma drivers/console/console.S \ 547d116dccSCC Ma drivers/delay_timer/delay_timer.c \ 55*1d0b990eSAntonio Nino Diaz drivers/delay_timer/generic_delay_timer.c \ 567d116dccSCC Ma lib/cpus/aarch64/aem_generic.S \ 577d116dccSCC Ma lib/cpus/aarch64/cortex_a53.S \ 587d116dccSCC Ma lib/cpus/aarch64/cortex_a57.S \ 597d116dccSCC Ma lib/cpus/aarch64/cortex_a72.S \ 607d116dccSCC Ma plat/common/aarch64/platform_mp_stack.S \ 61cf906b2aSLeon Chen ${MTK_PLAT}/common/mtk_plat_common.c \ 627d116dccSCC Ma ${MTK_PLAT}/common/mtk_sip_svc.c \ 637d116dccSCC Ma ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \ 647d116dccSCC Ma ${MTK_PLAT_SOC}/aarch64/platform_common.c \ 657d116dccSCC Ma ${MTK_PLAT_SOC}/bl31_plat_setup.c \ 667ace1cc0SYi Zheng ${MTK_PLAT_SOC}/drivers/crypt/crypt.c \ 677d116dccSCC Ma ${MTK_PLAT_SOC}/drivers/mtcmos/mtcmos.c \ 687d116dccSCC Ma ${MTK_PLAT_SOC}/drivers/pmic/pmic_wrap_init.c \ 697d116dccSCC Ma ${MTK_PLAT_SOC}/drivers/rtc/rtc.c \ 707d116dccSCC Ma ${MTK_PLAT_SOC}/drivers/spm/spm.c \ 717d116dccSCC Ma ${MTK_PLAT_SOC}/drivers/spm/spm_hotplug.c \ 727d116dccSCC Ma ${MTK_PLAT_SOC}/drivers/spm/spm_mcdi.c \ 737d116dccSCC Ma ${MTK_PLAT_SOC}/drivers/spm/spm_suspend.c \ 747d116dccSCC Ma ${MTK_PLAT_SOC}/drivers/timer/mt_cpuxgpt.c \ 757d116dccSCC Ma ${MTK_PLAT_SOC}/drivers/uart/8250_console.S \ 767d116dccSCC Ma ${MTK_PLAT_SOC}/plat_mt_gic.c \ 777d116dccSCC Ma ${MTK_PLAT_SOC}/plat_pm.c \ 787d116dccSCC Ma ${MTK_PLAT_SOC}/plat_sip_calls.c \ 797d116dccSCC Ma ${MTK_PLAT_SOC}/plat_topology.c \ 807d116dccSCC Ma ${MTK_PLAT_SOC}/power_tracer.c \ 817d116dccSCC Ma ${MTK_PLAT_SOC}/scu.c 827d116dccSCC Ma 837d116dccSCC Ma# Flag used by the MTK_platform port to determine the version of ARM GIC 847d116dccSCC Ma# architecture to use for interrupt management in EL3. 857d116dccSCC MaARM_GIC_ARCH := 2 867d116dccSCC Ma$(eval $(call add_define,ARM_GIC_ARCH)) 877d116dccSCC Ma 887d116dccSCC Ma# Enable workarounds for selected Cortex-A53 erratas. 897d116dccSCC MaERRATA_A53_826319 := 1 907d116dccSCC MaERRATA_A53_836870 := 1 917d116dccSCC Ma 927d116dccSCC Ma# indicate the reset vector address can be programmed 937d116dccSCC MaPROGRAMMABLE_RESET_ADDRESS := 1 94cf906b2aSLeon Chen 95cf906b2aSLeon Chen$(eval $(call add_define,MTK_SIP_SET_AUTHORIZED_SECURE_REG_ENABLE)) 96