1 /* 2 * Copyright (C) 2018 Marvell International Ltd. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * https://spdx.org/licenses 6 */ 7 8 #include <common/debug.h> 9 #include <common/runtime_svc.h> 10 #include <drivers/marvell/cache_llc.h> 11 #include <drivers/marvell/mochi/ap_setup.h> 12 #include <drivers/rambus/trng_ip_76.h> 13 #include <lib/smccc.h> 14 15 #include <marvell_plat_priv.h> 16 #include <plat_marvell.h> 17 18 #include "comphy/phy-comphy-cp110.h" 19 #include "secure_dfx_access/dfx.h" 20 #include <stdbool.h> 21 22 /* #define DEBUG_COMPHY */ 23 #ifdef DEBUG_COMPHY 24 #define debug(format...) NOTICE(format) 25 #else 26 #define debug(format, arg...) 27 #endif 28 29 /* Comphy related FID's */ 30 #define MV_SIP_COMPHY_POWER_ON 0x82000001 31 #define MV_SIP_COMPHY_POWER_OFF 0x82000002 32 #define MV_SIP_COMPHY_PLL_LOCK 0x82000003 33 #define MV_SIP_COMPHY_XFI_TRAIN 0x82000004 34 #define MV_SIP_COMPHY_DIG_RESET 0x82000005 35 36 /* Miscellaneous FID's' */ 37 #define MV_SIP_DRAM_SIZE 0x82000010 38 #define MV_SIP_LLC_ENABLE 0x82000011 39 #define MV_SIP_PMU_IRQ_ENABLE 0x82000012 40 #define MV_SIP_PMU_IRQ_DISABLE 0x82000013 41 #define MV_SIP_DFX 0x82000014 42 43 /* TRNG */ 44 #define MV_SIP_RNG_64 0xC200FF11 45 46 #define MAX_LANE_NR 6 47 #define MVEBU_COMPHY_OFFSET 0x441000 48 #define MVEBU_CP_BASE_MASK (~0xffffff) 49 50 /* This macro is used to identify COMPHY related calls from SMC function ID */ 51 #define is_comphy_fid(fid) \ 52 ((fid) >= MV_SIP_COMPHY_POWER_ON && (fid) <= MV_SIP_COMPHY_DIG_RESET) 53 54 _Bool is_cp_range_valid(u_register_t *addr) 55 { 56 int cp_nr; 57 58 *addr &= MVEBU_CP_BASE_MASK; 59 for (cp_nr = 0; cp_nr < CP_NUM; cp_nr++) { 60 if (*addr == MVEBU_CP_REGS_BASE(cp_nr)) 61 return true; 62 } 63 64 return false; 65 } 66 67 uintptr_t mrvl_sip_smc_handler(uint32_t smc_fid, 68 u_register_t x1, 69 u_register_t x2, 70 u_register_t x3, 71 u_register_t x4, 72 void *cookie, 73 void *handle, 74 u_register_t flags) 75 { 76 u_register_t ret, read; 77 uint32_t w2[2] = {0, 0}; 78 int i; 79 80 debug("%s: got SMC (0x%x) x1 0x%lx, x2 0x%lx, x3 0x%lx\n", 81 __func__, smc_fid, x1, x2, x3); 82 83 if (is_comphy_fid(smc_fid)) { 84 /* validate address passed via x1 */ 85 if (!is_cp_range_valid(&x1)) { 86 ERROR("%s: Wrong smc (0x%x) address: %lx\n", 87 __func__, smc_fid, x1); 88 SMC_RET1(handle, SMC_UNK); 89 } 90 91 x1 += MVEBU_COMPHY_OFFSET; 92 93 if (x2 >= MAX_LANE_NR) { 94 ERROR("%s: Wrong smc (0x%x) lane nr: %lx\n", 95 __func__, smc_fid, x2); 96 SMC_RET1(handle, SMC_UNK); 97 } 98 } 99 100 switch (smc_fid) { 101 102 /* Comphy related FID's */ 103 case MV_SIP_COMPHY_POWER_ON: 104 /* x1: comphy_base, x2: comphy_index, x3: comphy_mode */ 105 ret = mvebu_cp110_comphy_power_on(x1, x2, x3); 106 SMC_RET1(handle, ret); 107 case MV_SIP_COMPHY_POWER_OFF: 108 /* x1: comphy_base, x2: comphy_index */ 109 ret = mvebu_cp110_comphy_power_off(x1, x2, x3); 110 SMC_RET1(handle, ret); 111 case MV_SIP_COMPHY_PLL_LOCK: 112 /* x1: comphy_base, x2: comphy_index */ 113 ret = mvebu_cp110_comphy_is_pll_locked(x1, x2); 114 SMC_RET1(handle, ret); 115 case MV_SIP_COMPHY_XFI_TRAIN: 116 /* x1: comphy_base, x2: comphy_index */ 117 ret = mvebu_cp110_comphy_xfi_rx_training(x1, x2); 118 SMC_RET1(handle, ret); 119 case MV_SIP_COMPHY_DIG_RESET: 120 /* x1: comphy_base, x2: comphy_index, x3: mode, x4: command */ 121 ret = mvebu_cp110_comphy_digital_reset(x1, x2, x3, x4); 122 SMC_RET1(handle, ret); 123 124 /* Miscellaneous FID's' */ 125 case MV_SIP_DRAM_SIZE: 126 ret = mvebu_get_dram_size(MVEBU_REGS_BASE); 127 SMC_RET1(handle, ret); 128 case MV_SIP_LLC_ENABLE: 129 for (i = 0; i < ap_get_count(); i++) 130 llc_runtime_enable(i); 131 132 SMC_RET1(handle, 0); 133 #ifdef MVEBU_PMU_IRQ_WA 134 case MV_SIP_PMU_IRQ_ENABLE: 135 mvebu_pmu_interrupt_enable(); 136 SMC_RET1(handle, 0); 137 case MV_SIP_PMU_IRQ_DISABLE: 138 mvebu_pmu_interrupt_disable(); 139 SMC_RET1(handle, 0); 140 #endif 141 case MV_SIP_DFX: 142 if (x1 >= MV_SIP_DFX_THERMAL_INIT && 143 x1 <= MV_SIP_DFX_THERMAL_SEL_CHANNEL) { 144 ret = mvebu_dfx_thermal_handle(x1, &read, x2, x3); 145 SMC_RET2(handle, ret, read); 146 } 147 SMC_RET1(handle, SMC_UNK); 148 case MV_SIP_RNG_64: 149 ret = eip76_rng_get_random((uint8_t *)&w2, 4 * (x1 % 2 + 1)); 150 SMC_RET3(handle, ret, w2[0], w2[1]); 151 default: 152 ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid); 153 SMC_RET1(handle, SMC_UNK); 154 } 155 } 156 157 /* Define a runtime service descriptor for fast SMC calls */ 158 DECLARE_RT_SVC( 159 marvell_sip_svc, 160 OEN_SIP_START, 161 OEN_SIP_END, 162 SMC_TYPE_FAST, 163 NULL, 164 mrvl_sip_smc_handler 165 ); 166