xref: /rk3399_ARM-atf/plat/marvell/armada/a8k/common/aarch64/plat_arch_config.c (revision 0aa9f3c0f2f2ff675c3c12ae5ac6ceb475d6a16f)
1 /*
2  * Copyright (C) 2018 Marvell International Ltd.
3  *
4  * SPDX-License-Identifier:     BSD-3-Clause
5  * https://spdx.org/licenses
6  */
7 
8 #include <arch_helpers.h>
9 #include <common/debug.h>
10 #include <drivers/marvell/cache_llc.h>
11 #include <lib/mmio.h>
12 #include <plat/common/platform.h>
13 
14 #define CCU_HTC_ASET			(MVEBU_CCU_BASE(MVEBU_AP0) + 0x264)
15 #define MVEBU_IO_AFFINITY		(0xF00)
16 #define MVEBU_SF_REG			(MVEBU_REGS_BASE + 0x40)
17 #define MVEBU_SF_EN			BIT(8)
18 
19 #ifdef MVEBU_SOC_AP807
20 static void plat_enable_snoop_filter(void)
21 {
22 	int cpu_id = plat_my_core_pos();
23 
24 	/* Snoop filter needs to be enabled once per cluster */
25 	if (cpu_id % 2)
26 		return;
27 
28 	mmio_setbits_32(MVEBU_SF_REG, MVEBU_SF_EN);
29 }
30 #endif
31 
32 static void plat_enable_affinity(void)
33 {
34 	int cluster_id;
35 	int affinity;
36 
37 	/* set CPU Affinity */
38 	cluster_id = plat_my_core_pos() / PLAT_MARVELL_CLUSTER_CORE_COUNT;
39 	affinity = (MVEBU_IO_AFFINITY | (1 << cluster_id));
40 	mmio_write_32(CCU_HTC_ASET, affinity);
41 
42 	/* set barier */
43 	isb();
44 }
45 
46 void marvell_psci_arch_init(int die_index)
47 {
48 #if LLC_ENABLE
49 	/* check if LLC is in exclusive mode
50 	 * as L2 is configured to UniqueClean eviction
51 	 * (in a8k reset handler)
52 	 */
53 	if (llc_is_exclusive(0) == 0)
54 		ERROR("LLC should be configured to exclusice mode\n");
55 #endif
56 
57 	/* Enable Affinity */
58 	plat_enable_affinity();
59 
60 #ifdef MVEBU_SOC_AP807
61 	plat_enable_snoop_filter();
62 #endif
63 }
64