1# 2# Copyright (c) 2019-2020, ARM Limited and Contributors. All rights reserved. 3# Copyright (c) 2019-2020, Intel Corporation. All rights reserved. 4# 5# SPDX-License-Identifier: BSD-3-Clause 6# 7 8PLAT_INCLUDES := \ 9 -Iplat/intel/soc/agilex/include/ \ 10 -Iplat/intel/soc/common/drivers/ \ 11 -Iplat/intel/soc/common/include/ 12 13PLAT_BL_COMMON_SOURCES := \ 14 drivers/arm/gic/common/gic_common.c \ 15 drivers/arm/gic/v2/gicv2_main.c \ 16 drivers/arm/gic/v2/gicv2_helpers.c \ 17 drivers/delay_timer/delay_timer.c \ 18 drivers/delay_timer/generic_delay_timer.c \ 19 drivers/ti/uart/aarch64/16550_console.S \ 20 lib/xlat_tables/aarch64/xlat_tables.c \ 21 lib/xlat_tables/xlat_tables_common.c \ 22 plat/common/plat_gicv2.c \ 23 plat/intel/soc/common/aarch64/platform_common.c \ 24 plat/intel/soc/common/aarch64/plat_helpers.S 25 26BL2_SOURCES += \ 27 common/desc_image_load.c \ 28 drivers/mmc/mmc.c \ 29 drivers/intel/soc/stratix10/io/s10_memmap_qspi.c \ 30 drivers/io/io_storage.c \ 31 drivers/io/io_block.c \ 32 drivers/io/io_fip.c \ 33 drivers/partition/partition.c \ 34 drivers/partition/gpt.c \ 35 drivers/synopsys/emmc/dw_mmc.c \ 36 lib/cpus/aarch64/cortex_a53.S \ 37 plat/intel/soc/agilex/bl2_plat_setup.c \ 38 plat/intel/soc/agilex/soc/agilex_clock_manager.c \ 39 plat/intel/soc/agilex/soc/agilex_memory_controller.c \ 40 plat/intel/soc/agilex/soc/agilex_pinmux.c \ 41 plat/intel/soc/common/bl2_plat_mem_params_desc.c \ 42 plat/intel/soc/common/socfpga_delay_timer.c \ 43 plat/intel/soc/common/socfpga_image_load.c \ 44 plat/intel/soc/common/socfpga_storage.c \ 45 plat/intel/soc/common/soc/socfpga_emac.c \ 46 plat/intel/soc/common/soc/socfpga_handoff.c \ 47 plat/intel/soc/common/soc/socfpga_mailbox.c \ 48 plat/intel/soc/common/soc/socfpga_reset_manager.c \ 49 plat/intel/soc/common/soc/socfpga_system_manager.c \ 50 plat/intel/soc/common/drivers/qspi/cadence_qspi.c \ 51 plat/intel/soc/common/drivers/wdt/watchdog.c \ 52 plat/intel/soc/common/drivers/ccu/ncore_ccu.c 53 54BL31_SOURCES += \ 55 drivers/arm/cci/cci.c \ 56 lib/cpus/aarch64/aem_generic.S \ 57 lib/cpus/aarch64/cortex_a53.S \ 58 plat/common/plat_psci_common.c \ 59 plat/intel/soc/agilex/bl31_plat_setup.c \ 60 plat/intel/soc/common/socfpga_psci.c \ 61 plat/intel/soc/common/socfpga_sip_svc.c \ 62 plat/intel/soc/common/socfpga_topology.c \ 63 plat/intel/soc/common/soc/socfpga_mailbox.c \ 64 plat/intel/soc/common/soc/socfpga_reset_manager.c 65 66PROGRAMMABLE_RESET_ADDRESS := 0 67BL2_AT_EL3 := 1 68BL2_INV_DCACHE := 0 69MULTI_CONSOLE_API := 1 70USE_COHERENT_MEM := 1 71