xref: /rk3399_ARM-atf/plat/intel/soc/agilex/include/socfpga_plat_def.h (revision fcccd358e4cd6199c797ad127c77c47ec1ad5983)
1 /*
2  * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
3  * Copyright (c) 2019, Intel Corporation. All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #ifndef PLAT_SOCFPGA_DEF_H
9 #define PLAT_SOCFPGA_DEF_H
10 
11 #include <platform_def.h>
12 
13 /* Platform Setting */
14 #define PLATFORM_MODEL				PLAT_SOCFPGA_AGILEX
15 
16 /* Register Mapping */
17 #define SOCFPGA_MMC_REG_BASE			0xff808000
18 
19 #define SOCFPGA_RSTMGR_OFST			0xffd11000
20 #define SOCFPGA_RSTMGR_MPUMODRST_OFST		0xffd11020
21 
22 #endif /* PLAT_SOCFPGA_DEF_H */
23 
24