xref: /rk3399_ARM-atf/plat/imx/imx9/common/ele_api.c (revision 480e8dd9df291cc0e31695983fa6ff235e1671cd)
1 /*
2  * Copyright 2023-2025 NXP
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <common/debug.h>
8 #include <common/runtime_svc.h>
9 #include <lib/mmio.h>
10 
11 #include <ele_api.h>
12 #include <platform_def.h>
13 
14 #define ELE_MU_RSR	(ELE_MU_BASE + 0x12c)
15 #define ELE_MU_TRx(i)	(ELE_MU_BASE + 0x200 + (i) * 4)
16 #define ELE_MU_RRx(i)	(ELE_MU_BASE + 0x280 + (i) * 4)
17 
18 static struct ele_soc_info soc_info;
19 
imx9_soc_info_handler(uint32_t smc_fid,void * handle)20 int imx9_soc_info_handler(uint32_t smc_fid, void *handle)
21 {
22 	SMC_RET4(handle, 0x0, soc_info.soc,
23 		 soc_info.uid[1] | (uint64_t)soc_info.uid[0] << 32,
24 		 soc_info.uid[3] | (uint64_t)soc_info.uid[2] << 32);
25 }
26 
ele_get_soc_info(void)27 void ele_get_soc_info(void)
28 {
29 	uint32_t msg, resp;
30 
31 	flush_dcache_range((uint64_t)&soc_info, sizeof(struct ele_soc_info));
32 
33 	mmio_write_32(ELE_MU_TRx(0), ELE_GET_INFO_REQ);
34 	mmio_write_32(ELE_MU_TRx(1), ((uint64_t) &soc_info) >> 32);
35 	mmio_write_32(ELE_MU_TRx(2), ((uint64_t) &soc_info) & 0xffffffff);
36 	mmio_write_32(ELE_MU_TRx(3), sizeof(struct ele_soc_info));
37 
38 	do {
39 		resp = mmio_read_32(ELE_MU_RSR);
40 	} while ((resp & 0x3) != 0x3);
41 
42 	msg = mmio_read_32(ELE_MU_RRx(0));
43 	resp = mmio_read_32(ELE_MU_RRx(1));
44 	VERBOSE("msg : %x, resp: %x\n", msg, resp);
45 }
46 
ele_release_gmid(void)47 void ele_release_gmid(void)
48 {
49 	uint32_t msg, resp;
50 
51 	mmio_write_32(ELE_MU_TRx(0), ELE_RELEASE_GMID);
52 
53 	do {
54 		resp = mmio_read_32(ELE_MU_RSR);
55 	} while ((resp & 0x3) != 0x3);
56 
57 	msg = mmio_read_32(ELE_MU_RRx(0));
58 	resp = mmio_read_32(ELE_MU_RRx(1));
59 	VERBOSE("msg : %x, resp: %x\n", msg, resp);
60 }
61