1 /* 2 * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 9 #include <arch.h> 10 #include <lib/pmf/pmf.h> 11 #include <lib/psci/psci.h> 12 #include <plat/common/platform.h> 13 14 #if ENABLE_PSCI_STAT && ENABLE_PMF 15 #pragma weak plat_psci_stat_accounting_start 16 #pragma weak plat_psci_stat_accounting_stop 17 #pragma weak plat_psci_stat_get_residency 18 19 /* Ticks elapsed in one second by a signal of 1 MHz */ 20 #define MHZ_TICKS_PER_SEC 1000000U 21 22 /* Maximum time-stamp value read from architectural counters */ 23 #ifdef AARCH32 24 #define MAX_TS UINT32_MAX 25 #else 26 #define MAX_TS UINT64_MAX 27 #endif 28 29 /* Following are used as ID's to capture time-stamp */ 30 #define PSCI_STAT_ID_ENTER_LOW_PWR 0 31 #define PSCI_STAT_ID_EXIT_LOW_PWR 1 32 #define PSCI_STAT_TOTAL_IDS 2 33 34 PMF_REGISTER_SERVICE(psci_svc, PMF_PSCI_STAT_SVC_ID, PSCI_STAT_TOTAL_IDS, 35 PMF_STORE_ENABLE) 36 37 /* 38 * This function calculates the stats residency in microseconds, 39 * taking in account the wrap around condition. 40 */ 41 static u_register_t calc_stat_residency(unsigned long long pwrupts, 42 unsigned long long pwrdnts) 43 { 44 /* The divisor to use to convert raw timestamp into microseconds. */ 45 u_register_t residency_div; 46 u_register_t res; 47 48 /* 49 * Calculate divisor so that it can be directly used to 50 * convert time-stamp into microseconds. 51 */ 52 residency_div = read_cntfrq_el0() / MHZ_TICKS_PER_SEC; 53 assert(residency_div > 0U); 54 55 if (pwrupts < pwrdnts) 56 res = MAX_TS - pwrdnts + pwrupts; 57 else 58 res = pwrupts - pwrdnts; 59 60 return res / residency_div; 61 } 62 63 /* 64 * Capture timestamp before entering a low power state. 65 * No cache maintenance is required when capturing the timestamp. 66 * Cache maintenance may be needed when reading these timestamps. 67 */ 68 void plat_psci_stat_accounting_start( 69 __unused const psci_power_state_t *state_info) 70 { 71 assert(state_info != NULL); 72 PMF_CAPTURE_TIMESTAMP(psci_svc, PSCI_STAT_ID_ENTER_LOW_PWR, 73 PMF_NO_CACHE_MAINT); 74 } 75 76 /* 77 * Capture timestamp after exiting a low power state. 78 * No cache maintenance is required when capturing the timestamp. 79 * Cache maintenance may be needed when reading these timestamps. 80 */ 81 void plat_psci_stat_accounting_stop( 82 __unused const psci_power_state_t *state_info) 83 { 84 assert(state_info != NULL); 85 PMF_CAPTURE_TIMESTAMP(psci_svc, PSCI_STAT_ID_EXIT_LOW_PWR, 86 PMF_NO_CACHE_MAINT); 87 } 88 89 /* 90 * Calculate the residency for the given level and power state 91 * information. 92 */ 93 u_register_t plat_psci_stat_get_residency(unsigned int lvl, 94 const psci_power_state_t *state_info, 95 int last_cpu_idx) 96 { 97 plat_local_state_t state; 98 unsigned long long pwrup_ts = 0, pwrdn_ts = 0; 99 unsigned int pmf_flags; 100 101 assert((lvl >= PSCI_CPU_PWR_LVL) && (lvl <= PLAT_MAX_PWR_LVL)); 102 assert(state_info != NULL); 103 assert(last_cpu_idx <= PLATFORM_CORE_COUNT); 104 105 if (lvl == PSCI_CPU_PWR_LVL) 106 assert((unsigned int)last_cpu_idx == plat_my_core_pos()); 107 108 /* 109 * If power down is requested, then timestamp capture will 110 * be with caches OFF. Hence we have to do cache maintenance 111 * when reading the timestamp. 112 */ 113 state = state_info->pwr_domain_state[PSCI_CPU_PWR_LVL]; 114 if (is_local_state_off(state) != 0) { 115 pmf_flags = PMF_CACHE_MAINT; 116 } else { 117 assert(is_local_state_retn(state) == 1); 118 pmf_flags = PMF_NO_CACHE_MAINT; 119 } 120 121 PMF_GET_TIMESTAMP_BY_INDEX(psci_svc, 122 PSCI_STAT_ID_ENTER_LOW_PWR, 123 last_cpu_idx, 124 pmf_flags, 125 pwrdn_ts); 126 127 PMF_GET_TIMESTAMP_BY_INDEX(psci_svc, 128 PSCI_STAT_ID_EXIT_LOW_PWR, 129 plat_my_core_pos(), 130 pmf_flags, 131 pwrup_ts); 132 133 return calc_stat_residency(pwrup_ts, pwrdn_ts); 134 } 135 #endif /* ENABLE_PSCI_STAT && ENABLE_PMF */ 136 137 /* 138 * The PSCI generic code uses this API to let the platform participate in state 139 * coordination during a power management operation. It compares the platform 140 * specific local power states requested by each cpu for a given power domain 141 * and returns the coordinated target power state that the domain should 142 * enter. A platform assigns a number to a local power state. This default 143 * implementation assumes that the platform assigns these numbers in order of 144 * increasing depth of the power state i.e. for two power states X & Y, if X < Y 145 * then X represents a shallower power state than Y. As a result, the 146 * coordinated target local power state for a power domain will be the minimum 147 * of the requested local power states. 148 */ 149 plat_local_state_t plat_get_target_pwr_state(unsigned int lvl, 150 const plat_local_state_t *states, 151 unsigned int ncpu) 152 { 153 plat_local_state_t target = PLAT_MAX_OFF_STATE, temp; 154 const plat_local_state_t *st = states; 155 unsigned int n = ncpu; 156 157 assert(ncpu > 0U); 158 159 do { 160 temp = *st; 161 st++; 162 if (temp < target) 163 target = temp; 164 n--; 165 } while (n > 0U); 166 167 return target; 168 } 169