xref: /rk3399_ARM-atf/plat/common/plat_bl_common.c (revision 689dcfe0e31d5c2a0aab7e0d19a50001072de6b3)
1 /*
2  * Copyright (c) 2018-2025, Arm Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <assert.h>
8 
9 #include <arch_helpers.h>
10 #include <common/bl_common.h>
11 #include <common/debug.h>
12 #if TRANSFER_LIST
13 #include <transfer_list.h>
14 #endif
15 #include <lib/xlat_tables/xlat_tables_compat.h>
16 #include <plat/common/platform.h>
17 #include <services/arm_arch_svc.h>
18 #include <smccc_helpers.h>
19 #include <tools_share/firmware_encrypted.h>
20 
21 /*
22  * The following platform functions are weakly defined. The Platforms
23  * may redefine with strong definition.
24  */
25 #pragma weak bl2_el3_plat_prepare_exit
26 #pragma weak plat_error_handler
27 #pragma weak bl2_plat_preload_setup
28 #pragma weak bl2_plat_handle_pre_image_load
29 #pragma weak bl2_plat_handle_post_image_load
30 #pragma weak plat_get_enc_key_info
31 #pragma weak plat_is_smccc_feature_available
32 #pragma weak plat_get_soc_version
33 #pragma weak plat_get_soc_revision
34 #pragma weak plat_get_soc_name
35 
36 /* Pointer and function to register platform function to log GPT corruption */
37 const struct plat_log_gpt_corrupted *plat_log_gpt_ptr;
38 
plat_setup_log_gpt_corrupted(const struct plat_log_gpt_corrupted * log_gpt)39 void plat_setup_log_gpt_corrupted(const struct plat_log_gpt_corrupted *log_gpt)
40 {
41 	plat_log_gpt_ptr = log_gpt;
42 }
43 
plat_get_soc_version(void)44 int32_t plat_get_soc_version(void)
45 {
46 	return SMC_ARCH_CALL_NOT_SUPPORTED;
47 }
48 
plat_get_soc_revision(void)49 int32_t plat_get_soc_revision(void)
50 {
51 	return SMC_ARCH_CALL_NOT_SUPPORTED;
52 }
53 
plat_get_soc_name(char * soc_name __unused)54 int32_t plat_get_soc_name(char *soc_name __unused)
55 {
56 	return SMC_ARCH_CALL_NOT_SUPPORTED;
57 }
58 
plat_is_smccc_feature_available(u_register_t fid __unused)59 int32_t plat_is_smccc_feature_available(u_register_t fid __unused)
60 {
61 	(void)fid;
62 	return SMC_ARCH_CALL_NOT_SUPPORTED;
63 }
64 
bl2_el3_plat_prepare_exit(void)65 void bl2_el3_plat_prepare_exit(void)
66 {
67 }
68 
plat_error_handler(int err)69 void __dead2 plat_error_handler(int err)
70 {
71 	(void)err;
72 
73 	while (true) {
74 		wfi();
75 	}
76 }
77 
bl2_plat_preload_setup(void)78 void bl2_plat_preload_setup(void)
79 {
80 }
81 
bl2_plat_handle_pre_image_load(unsigned int image_id)82 int bl2_plat_handle_pre_image_load(unsigned int image_id)
83 {
84 	(void)image_id;
85 
86 	return 0;
87 }
88 
bl2_plat_handle_post_image_load(unsigned int image_id)89 int bl2_plat_handle_post_image_load(unsigned int image_id)
90 {
91 	(void)image_id;
92 
93 	return 0;
94 }
95 
96 /*
97  * Weak implementation to provide dummy decryption key only for test purposes,
98  * platforms must override this API for any real world firmware encryption
99  * use-case.
100  */
plat_get_enc_key_info(enum fw_enc_status_t fw_enc_status,uint8_t * key,size_t * key_len,unsigned int * flags,const uint8_t * img_id,size_t img_id_len)101 int plat_get_enc_key_info(enum fw_enc_status_t fw_enc_status, uint8_t *key,
102 			  size_t *key_len, unsigned int *flags,
103 			  const uint8_t *img_id, size_t img_id_len)
104 {
105 	(void)fw_enc_status;
106 	(void)img_id;
107 	(void)img_id_len;
108 
109 #define DUMMY_FIP_ENC_KEY { 0x12, 0x34, 0x56, 0x78, 0x90, 0xab, 0xcd, 0xef, \
110 			    0x12, 0x34, 0x56, 0x78, 0x90, 0xab, 0xcd, 0xef, \
111 			    0x12, 0x34, 0x56, 0x78, 0x90, 0xab, 0xcd, 0xef, \
112 			    0x12, 0x34, 0x56, 0x78, 0x90, 0xab, 0xcd, 0xef }
113 
114 	const uint8_t dummy_key[] = DUMMY_FIP_ENC_KEY;
115 
116 	assert(*key_len >= sizeof(dummy_key));
117 
118 	*key_len = sizeof(dummy_key);
119 	memcpy(key, dummy_key, *key_len);
120 	*flags = 0;
121 
122 	return 0;
123 }
124 
125 /*
126  * Set up the page tables for the generic and platform-specific memory regions.
127  * The size of the Trusted SRAM seen by the BL image must be specified as well
128  * as an array specifying the generic memory regions which can be;
129  * - Code section;
130  * - Read-only data section;
131  * - Init code section, if applicable
132  * - Coherent memory region, if applicable.
133  */
134 
setup_page_tables(const mmap_region_t * bl_regions,const mmap_region_t * plat_regions)135 void __init setup_page_tables(const mmap_region_t *bl_regions,
136 			      const mmap_region_t *plat_regions)
137 {
138 #if LOG_LEVEL >= LOG_LEVEL_VERBOSE
139 	const mmap_region_t *regions = bl_regions;
140 
141 	while (regions->size != 0U) {
142 		VERBOSE("Region: 0x%lx - 0x%lx has attributes 0x%x\n",
143 				regions->base_va,
144 				regions->base_va + regions->size,
145 				regions->attr);
146 		regions++;
147 	}
148 #endif
149 	/*
150 	 * Map the Trusted SRAM with appropriate memory attributes.
151 	 * Subsequent mappings will adjust the attributes for specific regions.
152 	 */
153 	mmap_add(bl_regions);
154 
155 	/* Now (re-)map the platform-specific memory regions */
156 	mmap_add(plat_regions);
157 
158 	/* Create the page tables to reflect the above mappings */
159 	init_xlat_tables();
160 }
161 
162 #if ((MEASURED_BOOT || DICE_PROTECTION_ENVIRONMENT) && TRANSFER_LIST)
plat_handoff_mboot(const void * data,uint32_t data_size,void * tl_base)163 int plat_handoff_mboot(const void *data, uint32_t data_size, void *tl_base)
164 {
165 	if (!transfer_list_add(tl_base, TL_TAG_TPM_EVLOG, data_size, data))
166 		return -1;
167 
168 	return 0;
169 }
170 #endif
171