1 /* 2 * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <arch_helpers.h> 32 #include <assert.h> 33 #include <arm_gic.h> 34 #include <cci.h> 35 #include <css_pm.h> 36 #include <debug.h> 37 #include <errno.h> 38 #include <plat_arm.h> 39 #include <platform.h> 40 #include <platform_def.h> 41 #include "css_scpi.h" 42 43 /* Allow CSS platforms to override `plat_arm_psci_pm_ops` */ 44 #pragma weak plat_arm_psci_pm_ops 45 46 #if ARM_RECOM_STATE_ID_ENC 47 /* 48 * The table storing the valid idle power states. Ensure that the 49 * array entries are populated in ascending order of state-id to 50 * enable us to use binary search during power state validation. 51 * The table must be terminated by a NULL entry. 52 */ 53 const unsigned int arm_pm_idle_states[] = { 54 /* State-id - 0x01 */ 55 arm_make_pwrstate_lvl1(ARM_LOCAL_STATE_RUN, ARM_LOCAL_STATE_RET, 56 ARM_PWR_LVL0, PSTATE_TYPE_STANDBY), 57 /* State-id - 0x02 */ 58 arm_make_pwrstate_lvl1(ARM_LOCAL_STATE_RUN, ARM_LOCAL_STATE_OFF, 59 ARM_PWR_LVL0, PSTATE_TYPE_POWERDOWN), 60 /* State-id - 0x22 */ 61 arm_make_pwrstate_lvl1(ARM_LOCAL_STATE_OFF, ARM_LOCAL_STATE_OFF, 62 ARM_PWR_LVL1, PSTATE_TYPE_POWERDOWN), 63 0, 64 }; 65 #endif 66 67 /******************************************************************************* 68 * Handler called when a power domain is about to be turned on. The 69 * level and mpidr determine the affinity instance. 70 ******************************************************************************/ 71 int css_pwr_domain_on(u_register_t mpidr) 72 { 73 /* 74 * SCP takes care of powering up parent power domains so we 75 * only need to care about level 0 76 */ 77 scpi_set_css_power_state(mpidr, scpi_power_on, scpi_power_on, 78 scpi_power_on); 79 80 return PSCI_E_SUCCESS; 81 } 82 83 /******************************************************************************* 84 * Handler called when a power level has just been powered on after 85 * being turned off earlier. The target_state encodes the low power state that 86 * each level has woken up from. 87 ******************************************************************************/ 88 void css_pwr_domain_on_finish(const psci_power_state_t *target_state) 89 { 90 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == 91 ARM_LOCAL_STATE_OFF); 92 93 /* 94 * Perform the common cluster specific operations i.e enable coherency 95 * if this cluster was off. 96 */ 97 if (target_state->pwr_domain_state[ARM_PWR_LVL1] == 98 ARM_LOCAL_STATE_OFF) 99 cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1())); 100 101 /* Enable the gic cpu interface */ 102 arm_gic_cpuif_setup(); 103 104 /* todo: Is this setup only needed after a cold boot? */ 105 arm_gic_pcpu_distif_setup(); 106 } 107 108 /******************************************************************************* 109 * Common function called while turning a cpu off or suspending it. It is called 110 * from css_off() or css_suspend() when these functions in turn are called for 111 * power domain at the highest power level which will be powered down. It 112 * performs the actions common to the OFF and SUSPEND calls. 113 ******************************************************************************/ 114 static void css_power_down_common(const psci_power_state_t *target_state) 115 { 116 uint32_t cluster_state = scpi_power_on; 117 118 /* Prevent interrupts from spuriously waking up this cpu */ 119 arm_gic_cpuif_deactivate(); 120 121 /* Cluster is to be turned off, so disable coherency */ 122 if (target_state->pwr_domain_state[ARM_PWR_LVL1] == 123 ARM_LOCAL_STATE_OFF) { 124 cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr())); 125 cluster_state = scpi_power_off; 126 } 127 128 /* 129 * Ask the SCP to power down the appropriate components depending upon 130 * their state. 131 */ 132 scpi_set_css_power_state(read_mpidr_el1(), 133 scpi_power_off, 134 cluster_state, 135 scpi_power_on); 136 } 137 138 /******************************************************************************* 139 * Handler called when a power domain is about to be turned off. The 140 * target_state encodes the power state that each level should transition to. 141 ******************************************************************************/ 142 void css_pwr_domain_off(const psci_power_state_t *target_state) 143 { 144 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == 145 ARM_LOCAL_STATE_OFF); 146 147 css_power_down_common(target_state); 148 } 149 150 /******************************************************************************* 151 * Handler called when a power domain is about to be suspended. The 152 * target_state encodes the power state that each level should transition to. 153 ******************************************************************************/ 154 void css_pwr_domain_suspend(const psci_power_state_t *target_state) 155 { 156 /* 157 * Juno has retention only at cpu level. Just return 158 * as nothing is to be done for retention. 159 */ 160 if (target_state->pwr_domain_state[ARM_PWR_LVL0] == 161 ARM_LOCAL_STATE_RET) 162 return; 163 164 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == 165 ARM_LOCAL_STATE_OFF); 166 167 css_power_down_common(target_state); 168 } 169 170 /******************************************************************************* 171 * Handler called when a power domain has just been powered on after 172 * having been suspended earlier. The target_state encodes the low power state 173 * that each level has woken up from. 174 * TODO: At the moment we reuse the on finisher and reinitialize the secure 175 * context. Need to implement a separate suspend finisher. 176 ******************************************************************************/ 177 void css_pwr_domain_suspend_finish( 178 const psci_power_state_t *target_state) 179 { 180 /* 181 * Return as nothing is to be done on waking up from retention. 182 */ 183 if (target_state->pwr_domain_state[ARM_PWR_LVL0] == 184 ARM_LOCAL_STATE_RET) 185 return; 186 187 css_pwr_domain_on_finish(target_state); 188 } 189 190 /******************************************************************************* 191 * Handlers to shutdown/reboot the system 192 ******************************************************************************/ 193 void __dead2 css_system_off(void) 194 { 195 uint32_t response; 196 197 /* Send the power down request to the SCP */ 198 response = scpi_sys_power_state(scpi_system_shutdown); 199 200 if (response != SCP_OK) { 201 ERROR("CSS System Off: SCP error %u.\n", response); 202 panic(); 203 } 204 wfi(); 205 ERROR("CSS System Off: operation not handled.\n"); 206 panic(); 207 } 208 209 void __dead2 css_system_reset(void) 210 { 211 uint32_t response; 212 213 /* Send the system reset request to the SCP */ 214 response = scpi_sys_power_state(scpi_system_reboot); 215 216 if (response != SCP_OK) { 217 ERROR("CSS System Reset: SCP error %u.\n", response); 218 panic(); 219 } 220 wfi(); 221 ERROR("CSS System Reset: operation not handled.\n"); 222 panic(); 223 } 224 225 /******************************************************************************* 226 * Handler called when the CPU power domain is about to enter standby. 227 ******************************************************************************/ 228 void css_cpu_standby(plat_local_state_t cpu_state) 229 { 230 unsigned int scr; 231 232 assert(cpu_state == ARM_LOCAL_STATE_RET); 233 234 scr = read_scr_el3(); 235 /* Enable PhysicalIRQ bit for NS world to wake the CPU */ 236 write_scr_el3(scr | SCR_IRQ_BIT); 237 isb(); 238 dsb(); 239 wfi(); 240 241 /* 242 * Restore SCR to the original value, synchronisation of scr_el3 is 243 * done by eret while el3_exit to save some execution cycles. 244 */ 245 write_scr_el3(scr); 246 } 247 248 /******************************************************************************* 249 * Export the platform handlers via plat_arm_psci_pm_ops. The ARM Standard 250 * platform will take care of registering the handlers with PSCI. 251 ******************************************************************************/ 252 const plat_psci_ops_t plat_arm_psci_pm_ops = { 253 .pwr_domain_on = css_pwr_domain_on, 254 .pwr_domain_on_finish = css_pwr_domain_on_finish, 255 .pwr_domain_off = css_pwr_domain_off, 256 .cpu_standby = css_cpu_standby, 257 .pwr_domain_suspend = css_pwr_domain_suspend, 258 .pwr_domain_suspend_finish = css_pwr_domain_suspend_finish, 259 .system_off = css_system_off, 260 .system_reset = css_system_reset, 261 .validate_power_state = arm_validate_power_state, 262 .validate_ns_entrypoint = arm_validate_ns_entrypoint 263 }; 264