1 /* 2 * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <assert.h> 32 #include <arch_helpers.h> 33 #include <arm_gic.h> 34 #include <cci.h> 35 #include <css_def.h> 36 #include <debug.h> 37 #include <errno.h> 38 #include <plat_arm.h> 39 #include <platform.h> 40 #include <platform_def.h> 41 #include <psci.h> 42 #include "css_scpi.h" 43 44 45 #if ARM_RECOM_STATE_ID_ENC 46 /* 47 * The table storing the valid idle power states. Ensure that the 48 * array entries are populated in ascending order of state-id to 49 * enable us to use binary search during power state validation. 50 * The table must be terminated by a NULL entry. 51 */ 52 const unsigned int arm_pm_idle_states[] = { 53 /* State-id - 0x01 */ 54 arm_make_pwrstate_lvl1(ARM_LOCAL_STATE_RUN, ARM_LOCAL_STATE_RET, 55 ARM_PWR_LVL0, PSTATE_TYPE_STANDBY), 56 /* State-id - 0x02 */ 57 arm_make_pwrstate_lvl1(ARM_LOCAL_STATE_RUN, ARM_LOCAL_STATE_OFF, 58 ARM_PWR_LVL0, PSTATE_TYPE_POWERDOWN), 59 /* State-id - 0x22 */ 60 arm_make_pwrstate_lvl1(ARM_LOCAL_STATE_OFF, ARM_LOCAL_STATE_OFF, 61 ARM_PWR_LVL1, PSTATE_TYPE_POWERDOWN), 62 0, 63 }; 64 #endif 65 66 /******************************************************************************* 67 * Private function to program the mailbox for a cpu before it is released 68 * from reset. 69 ******************************************************************************/ 70 static void css_program_mailbox(uintptr_t address) 71 { 72 uintptr_t *mailbox = (void *) TRUSTED_MAILBOX_BASE; 73 *mailbox = address; 74 flush_dcache_range((uintptr_t) mailbox, sizeof(*mailbox)); 75 } 76 77 /******************************************************************************* 78 * Handler called when a power domain is about to be turned on. The 79 * level and mpidr determine the affinity instance. 80 ******************************************************************************/ 81 int css_pwr_domain_on(u_register_t mpidr) 82 { 83 /* 84 * SCP takes care of powering up parent power domains so we 85 * only need to care about level 0 86 */ 87 scpi_set_css_power_state(mpidr, scpi_power_on, scpi_power_on, 88 scpi_power_on); 89 90 return PSCI_E_SUCCESS; 91 } 92 93 /******************************************************************************* 94 * Handler called when a power level has just been powered on after 95 * being turned off earlier. The target_state encodes the low power state that 96 * each level has woken up from. 97 ******************************************************************************/ 98 void css_pwr_domain_on_finish(const psci_power_state_t *target_state) 99 { 100 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == 101 ARM_LOCAL_STATE_OFF); 102 103 /* 104 * Perform the common cluster specific operations i.e enable coherency 105 * if this cluster was off. 106 */ 107 if (target_state->pwr_domain_state[ARM_PWR_LVL1] == 108 ARM_LOCAL_STATE_OFF) 109 cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1())); 110 111 /* Enable the gic cpu interface */ 112 arm_gic_cpuif_setup(); 113 114 /* todo: Is this setup only needed after a cold boot? */ 115 arm_gic_pcpu_distif_setup(); 116 } 117 118 /******************************************************************************* 119 * Common function called while turning a cpu off or suspending it. It is called 120 * from css_off() or css_suspend() when these functions in turn are called for 121 * power domain at the highest power level which will be powered down. It 122 * performs the actions common to the OFF and SUSPEND calls. 123 ******************************************************************************/ 124 static void css_power_down_common(const psci_power_state_t *target_state) 125 { 126 uint32_t cluster_state = scpi_power_on; 127 128 /* Prevent interrupts from spuriously waking up this cpu */ 129 arm_gic_cpuif_deactivate(); 130 131 /* Cluster is to be turned off, so disable coherency */ 132 if (target_state->pwr_domain_state[ARM_PWR_LVL1] == 133 ARM_LOCAL_STATE_OFF) { 134 cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr())); 135 cluster_state = scpi_power_off; 136 } 137 138 /* 139 * Ask the SCP to power down the appropriate components depending upon 140 * their state. 141 */ 142 scpi_set_css_power_state(read_mpidr_el1(), 143 scpi_power_off, 144 cluster_state, 145 scpi_power_on); 146 } 147 148 /******************************************************************************* 149 * Handler called when a power domain is about to be turned off. The 150 * target_state encodes the power state that each level should transition to. 151 ******************************************************************************/ 152 static void css_pwr_domain_off(const psci_power_state_t *target_state) 153 { 154 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == 155 ARM_LOCAL_STATE_OFF); 156 157 css_power_down_common(target_state); 158 } 159 160 /******************************************************************************* 161 * Handler called when a power domain is about to be suspended. The 162 * target_state encodes the power state that each level should transition to. 163 ******************************************************************************/ 164 static void css_pwr_domain_suspend(const psci_power_state_t *target_state) 165 { 166 /* 167 * Juno has retention only at cpu level. Just return 168 * as nothing is to be done for retention. 169 */ 170 if (target_state->pwr_domain_state[ARM_PWR_LVL0] == 171 ARM_LOCAL_STATE_RET) 172 return; 173 174 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == 175 ARM_LOCAL_STATE_OFF); 176 177 css_power_down_common(target_state); 178 } 179 180 /******************************************************************************* 181 * Handler called when a power domain has just been powered on after 182 * having been suspended earlier. The target_state encodes the low power state 183 * that each level has woken up from. 184 * TODO: At the moment we reuse the on finisher and reinitialize the secure 185 * context. Need to implement a separate suspend finisher. 186 ******************************************************************************/ 187 static void css_pwr_domain_suspend_finish( 188 const psci_power_state_t *target_state) 189 { 190 /* 191 * Return as nothing is to be done on waking up from retention. 192 */ 193 if (target_state->pwr_domain_state[ARM_PWR_LVL0] == 194 ARM_LOCAL_STATE_RET) 195 return; 196 197 css_pwr_domain_on_finish(target_state); 198 } 199 200 /******************************************************************************* 201 * Handlers to shutdown/reboot the system 202 ******************************************************************************/ 203 static void __dead2 css_system_off(void) 204 { 205 uint32_t response; 206 207 /* Send the power down request to the SCP */ 208 response = scpi_sys_power_state(scpi_system_shutdown); 209 210 if (response != SCP_OK) { 211 ERROR("CSS System Off: SCP error %u.\n", response); 212 panic(); 213 } 214 wfi(); 215 ERROR("CSS System Off: operation not handled.\n"); 216 panic(); 217 } 218 219 static void __dead2 css_system_reset(void) 220 { 221 uint32_t response; 222 223 /* Send the system reset request to the SCP */ 224 response = scpi_sys_power_state(scpi_system_reboot); 225 226 if (response != SCP_OK) { 227 ERROR("CSS System Reset: SCP error %u.\n", response); 228 panic(); 229 } 230 wfi(); 231 ERROR("CSS System Reset: operation not handled.\n"); 232 panic(); 233 } 234 235 /******************************************************************************* 236 * Handler called when the CPU power domain is about to enter standby. 237 ******************************************************************************/ 238 void css_cpu_standby(plat_local_state_t cpu_state) 239 { 240 unsigned int scr; 241 242 assert(cpu_state == ARM_LOCAL_STATE_RET); 243 244 scr = read_scr_el3(); 245 /* Enable PhysicalIRQ bit for NS world to wake the CPU */ 246 write_scr_el3(scr | SCR_IRQ_BIT); 247 isb(); 248 dsb(); 249 wfi(); 250 251 /* 252 * Restore SCR to the original value, synchronisation of scr_el3 is 253 * done by eret while el3_exit to save some execution cycles. 254 */ 255 write_scr_el3(scr); 256 } 257 258 /******************************************************************************* 259 * Export the platform handlers to enable psci to invoke them 260 ******************************************************************************/ 261 static const plat_psci_ops_t css_ops = { 262 .pwr_domain_on = css_pwr_domain_on, 263 .pwr_domain_on_finish = css_pwr_domain_on_finish, 264 .pwr_domain_off = css_pwr_domain_off, 265 .cpu_standby = css_cpu_standby, 266 .pwr_domain_suspend = css_pwr_domain_suspend, 267 .pwr_domain_suspend_finish = css_pwr_domain_suspend_finish, 268 .system_off = css_system_off, 269 .system_reset = css_system_reset, 270 .validate_power_state = arm_validate_power_state 271 }; 272 273 /******************************************************************************* 274 * Export the platform specific psci ops. 275 ******************************************************************************/ 276 int plat_setup_psci_ops(uintptr_t sec_entrypoint, 277 const plat_psci_ops_t **psci_ops) 278 { 279 *psci_ops = &css_ops; 280 281 /* Setup mailbox with entry point. */ 282 css_program_mailbox(sec_entrypoint); 283 return 0; 284 } 285