1 /* 2 * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <arch_helpers.h> 32 #include <assert.h> 33 #include <arm_gic.h> 34 #include <cci.h> 35 #include <css_pm.h> 36 #include <debug.h> 37 #include <errno.h> 38 #include <plat_arm.h> 39 #include <platform.h> 40 #include <platform_def.h> 41 #include "css_scpi.h" 42 43 /* Allow CSS platforms to override `plat_arm_psci_pm_ops` */ 44 #pragma weak plat_arm_psci_pm_ops 45 46 #if ARM_RECOM_STATE_ID_ENC 47 /* 48 * The table storing the valid idle power states. Ensure that the 49 * array entries are populated in ascending order of state-id to 50 * enable us to use binary search during power state validation. 51 * The table must be terminated by a NULL entry. 52 */ 53 const unsigned int arm_pm_idle_states[] = { 54 /* State-id - 0x001 */ 55 arm_make_pwrstate_lvl2(ARM_LOCAL_STATE_RUN, ARM_LOCAL_STATE_RUN, 56 ARM_LOCAL_STATE_RET, ARM_PWR_LVL0, PSTATE_TYPE_STANDBY), 57 /* State-id - 0x002 */ 58 arm_make_pwrstate_lvl2(ARM_LOCAL_STATE_RUN, ARM_LOCAL_STATE_RUN, 59 ARM_LOCAL_STATE_OFF, ARM_PWR_LVL0, PSTATE_TYPE_POWERDOWN), 60 /* State-id - 0x022 */ 61 arm_make_pwrstate_lvl2(ARM_LOCAL_STATE_RUN, ARM_LOCAL_STATE_OFF, 62 ARM_LOCAL_STATE_OFF, ARM_PWR_LVL1, PSTATE_TYPE_POWERDOWN), 63 #if PLAT_MAX_PWR_LVL > ARM_PWR_LVL1 64 /* State-id - 0x222 */ 65 arm_make_pwrstate_lvl2(ARM_LOCAL_STATE_OFF, ARM_LOCAL_STATE_OFF, 66 ARM_LOCAL_STATE_OFF, ARM_PWR_LVL2, PSTATE_TYPE_POWERDOWN), 67 #endif 68 0, 69 }; 70 #endif /* __ARM_RECOM_STATE_ID_ENC__ */ 71 72 /******************************************************************************* 73 * Handler called when a power domain is about to be turned on. The 74 * level and mpidr determine the affinity instance. 75 ******************************************************************************/ 76 int css_pwr_domain_on(u_register_t mpidr) 77 { 78 /* 79 * SCP takes care of powering up parent power domains so we 80 * only need to care about level 0 81 */ 82 scpi_set_css_power_state(mpidr, scpi_power_on, scpi_power_on, 83 scpi_power_on); 84 85 return PSCI_E_SUCCESS; 86 } 87 88 /******************************************************************************* 89 * Handler called when a power level has just been powered on after 90 * being turned off earlier. The target_state encodes the low power state that 91 * each level has woken up from. 92 ******************************************************************************/ 93 void css_pwr_domain_on_finish(const psci_power_state_t *target_state) 94 { 95 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == 96 ARM_LOCAL_STATE_OFF); 97 98 /* 99 * Perform the common cluster specific operations i.e enable coherency 100 * if this cluster was off. 101 */ 102 if (target_state->pwr_domain_state[ARM_PWR_LVL1] == 103 ARM_LOCAL_STATE_OFF) 104 cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1())); 105 106 /* Enable the gic cpu interface */ 107 arm_gic_cpuif_setup(); 108 109 /* todo: Is this setup only needed after a cold boot? */ 110 arm_gic_pcpu_distif_setup(); 111 } 112 113 /******************************************************************************* 114 * Common function called while turning a cpu off or suspending it. It is called 115 * from css_off() or css_suspend() when these functions in turn are called for 116 * power domain at the highest power level which will be powered down. It 117 * performs the actions common to the OFF and SUSPEND calls. 118 ******************************************************************************/ 119 static void css_power_down_common(const psci_power_state_t *target_state) 120 { 121 uint32_t cluster_state = scpi_power_on; 122 123 /* Prevent interrupts from spuriously waking up this cpu */ 124 arm_gic_cpuif_deactivate(); 125 126 /* Cluster is to be turned off, so disable coherency */ 127 if (target_state->pwr_domain_state[ARM_PWR_LVL1] == 128 ARM_LOCAL_STATE_OFF) { 129 cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr())); 130 cluster_state = scpi_power_off; 131 } 132 133 /* 134 * Ask the SCP to power down the appropriate components depending upon 135 * their state. 136 */ 137 scpi_set_css_power_state(read_mpidr_el1(), 138 scpi_power_off, 139 cluster_state, 140 scpi_power_on); 141 } 142 143 /******************************************************************************* 144 * Handler called when a power domain is about to be turned off. The 145 * target_state encodes the power state that each level should transition to. 146 ******************************************************************************/ 147 void css_pwr_domain_off(const psci_power_state_t *target_state) 148 { 149 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == 150 ARM_LOCAL_STATE_OFF); 151 152 css_power_down_common(target_state); 153 } 154 155 /******************************************************************************* 156 * Handler called when a power domain is about to be suspended. The 157 * target_state encodes the power state that each level should transition to. 158 ******************************************************************************/ 159 void css_pwr_domain_suspend(const psci_power_state_t *target_state) 160 { 161 /* 162 * Juno has retention only at cpu level. Just return 163 * as nothing is to be done for retention. 164 */ 165 if (target_state->pwr_domain_state[ARM_PWR_LVL0] == 166 ARM_LOCAL_STATE_RET) 167 return; 168 169 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == 170 ARM_LOCAL_STATE_OFF); 171 172 css_power_down_common(target_state); 173 } 174 175 /******************************************************************************* 176 * Handler called when a power domain has just been powered on after 177 * having been suspended earlier. The target_state encodes the low power state 178 * that each level has woken up from. 179 * TODO: At the moment we reuse the on finisher and reinitialize the secure 180 * context. Need to implement a separate suspend finisher. 181 ******************************************************************************/ 182 void css_pwr_domain_suspend_finish( 183 const psci_power_state_t *target_state) 184 { 185 /* 186 * Return as nothing is to be done on waking up from retention. 187 */ 188 if (target_state->pwr_domain_state[ARM_PWR_LVL0] == 189 ARM_LOCAL_STATE_RET) 190 return; 191 192 css_pwr_domain_on_finish(target_state); 193 } 194 195 /******************************************************************************* 196 * Handlers to shutdown/reboot the system 197 ******************************************************************************/ 198 void __dead2 css_system_off(void) 199 { 200 uint32_t response; 201 202 /* Send the power down request to the SCP */ 203 response = scpi_sys_power_state(scpi_system_shutdown); 204 205 if (response != SCP_OK) { 206 ERROR("CSS System Off: SCP error %u.\n", response); 207 panic(); 208 } 209 wfi(); 210 ERROR("CSS System Off: operation not handled.\n"); 211 panic(); 212 } 213 214 void __dead2 css_system_reset(void) 215 { 216 uint32_t response; 217 218 /* Send the system reset request to the SCP */ 219 response = scpi_sys_power_state(scpi_system_reboot); 220 221 if (response != SCP_OK) { 222 ERROR("CSS System Reset: SCP error %u.\n", response); 223 panic(); 224 } 225 wfi(); 226 ERROR("CSS System Reset: operation not handled.\n"); 227 panic(); 228 } 229 230 /******************************************************************************* 231 * Handler called when the CPU power domain is about to enter standby. 232 ******************************************************************************/ 233 void css_cpu_standby(plat_local_state_t cpu_state) 234 { 235 unsigned int scr; 236 237 assert(cpu_state == ARM_LOCAL_STATE_RET); 238 239 scr = read_scr_el3(); 240 /* Enable PhysicalIRQ bit for NS world to wake the CPU */ 241 write_scr_el3(scr | SCR_IRQ_BIT); 242 isb(); 243 dsb(); 244 wfi(); 245 246 /* 247 * Restore SCR to the original value, synchronisation of scr_el3 is 248 * done by eret while el3_exit to save some execution cycles. 249 */ 250 write_scr_el3(scr); 251 } 252 253 /******************************************************************************* 254 * Export the platform handlers via plat_arm_psci_pm_ops. The ARM Standard 255 * platform will take care of registering the handlers with PSCI. 256 ******************************************************************************/ 257 const plat_psci_ops_t plat_arm_psci_pm_ops = { 258 .pwr_domain_on = css_pwr_domain_on, 259 .pwr_domain_on_finish = css_pwr_domain_on_finish, 260 .pwr_domain_off = css_pwr_domain_off, 261 .cpu_standby = css_cpu_standby, 262 .pwr_domain_suspend = css_pwr_domain_suspend, 263 .pwr_domain_suspend_finish = css_pwr_domain_suspend_finish, 264 .system_off = css_system_off, 265 .system_reset = css_system_reset, 266 .validate_power_state = arm_validate_power_state, 267 .validate_ns_entrypoint = arm_validate_ns_entrypoint 268 }; 269