1 /* 2 * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <assert.h> 32 #include <arch_helpers.h> 33 #include <arm_gic.h> 34 #include <cci.h> 35 #include <css_def.h> 36 #include <debug.h> 37 #include <errno.h> 38 #include <plat_arm.h> 39 #include <platform.h> 40 #include <platform_def.h> 41 #include <psci.h> 42 #include "css_scpi.h" 43 44 unsigned long wakeup_address; 45 46 /******************************************************************************* 47 * Private function to program the mailbox for a cpu before it is released 48 * from reset. 49 ******************************************************************************/ 50 static void css_program_mailbox(uint64_t mpidr, uint64_t address) 51 { 52 uint64_t linear_id; 53 uint64_t mbox; 54 55 linear_id = plat_arm_calc_core_pos(mpidr); 56 mbox = TRUSTED_MAILBOXES_BASE + (linear_id << TRUSTED_MAILBOX_SHIFT); 57 *((uint64_t *) mbox) = address; 58 flush_dcache_range(mbox, sizeof(mbox)); 59 } 60 61 /******************************************************************************* 62 * Handler called when a power domain is about to be turned on. The 63 * level and mpidr determine the affinity instance. 64 ******************************************************************************/ 65 int css_pwr_domain_on(u_register_t mpidr) 66 { 67 /* 68 * SCP takes care of powering up parent power domains so we 69 * only need to care about level 0 70 */ 71 72 /* 73 * Setup mailbox with address for CPU entrypoint when it next powers up 74 */ 75 css_program_mailbox(mpidr, wakeup_address); 76 77 scpi_set_css_power_state(mpidr, scpi_power_on, scpi_power_on, 78 scpi_power_on); 79 80 return PSCI_E_SUCCESS; 81 } 82 83 /******************************************************************************* 84 * Handler called when a power level has just been powered on after 85 * being turned off earlier. The target_state encodes the low power state that 86 * each level has woken up from. 87 ******************************************************************************/ 88 void css_pwr_domain_on_finish(const psci_power_state_t *target_state) 89 { 90 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == 91 ARM_LOCAL_STATE_OFF); 92 93 /* 94 * Perform the common cluster specific operations i.e enable coherency 95 * if this cluster was off. 96 */ 97 if (target_state->pwr_domain_state[ARM_PWR_LVL1] == 98 ARM_LOCAL_STATE_OFF) 99 cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1())); 100 101 /* Enable the gic cpu interface */ 102 arm_gic_cpuif_setup(); 103 104 /* todo: Is this setup only needed after a cold boot? */ 105 arm_gic_pcpu_distif_setup(); 106 107 /* Clear the mailbox for this cpu. */ 108 css_program_mailbox(read_mpidr_el1(), 0); 109 } 110 111 /******************************************************************************* 112 * Common function called while turning a cpu off or suspending it. It is called 113 * from css_off() or css_suspend() when these functions in turn are called for 114 * power domain at the highest power level which will be powered down. It 115 * performs the actions common to the OFF and SUSPEND calls. 116 ******************************************************************************/ 117 static void css_power_down_common(const psci_power_state_t *target_state) 118 { 119 uint32_t cluster_state = scpi_power_on; 120 121 /* Prevent interrupts from spuriously waking up this cpu */ 122 arm_gic_cpuif_deactivate(); 123 124 /* Cluster is to be turned off, so disable coherency */ 125 if (target_state->pwr_domain_state[ARM_PWR_LVL1] == 126 ARM_LOCAL_STATE_OFF) { 127 cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr())); 128 cluster_state = scpi_power_off; 129 } 130 131 /* 132 * Ask the SCP to power down the appropriate components depending upon 133 * their state. 134 */ 135 scpi_set_css_power_state(read_mpidr_el1(), 136 scpi_power_off, 137 cluster_state, 138 scpi_power_on); 139 } 140 141 /******************************************************************************* 142 * Handler called when a power domain is about to be turned off. The 143 * target_state encodes the power state that each level should transition to. 144 ******************************************************************************/ 145 static void css_pwr_domain_off(const psci_power_state_t *target_state) 146 { 147 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == 148 ARM_LOCAL_STATE_OFF); 149 150 css_power_down_common(target_state); 151 } 152 153 /******************************************************************************* 154 * Handler called when a power domain is about to be suspended. The 155 * target_state encodes the power state that each level should transition to. 156 ******************************************************************************/ 157 static void css_pwr_domain_suspend(const psci_power_state_t *target_state) 158 { 159 /* 160 * Juno has retention only at cpu level. Just return 161 * as nothing is to be done for retention. 162 */ 163 if (target_state->pwr_domain_state[ARM_PWR_LVL0] == 164 ARM_LOCAL_STATE_RET) 165 return; 166 167 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == 168 ARM_LOCAL_STATE_OFF); 169 170 /* 171 * Setup mailbox with address for CPU entrypoint when it next powers up. 172 */ 173 css_program_mailbox(read_mpidr_el1(), wakeup_address); 174 175 css_power_down_common(target_state); 176 } 177 178 /******************************************************************************* 179 * Handler called when a power domain has just been powered on after 180 * having been suspended earlier. The target_state encodes the low power state 181 * that each level has woken up from. 182 * TODO: At the moment we reuse the on finisher and reinitialize the secure 183 * context. Need to implement a separate suspend finisher. 184 ******************************************************************************/ 185 static void css_pwr_domain_suspend_finish( 186 const psci_power_state_t *target_state) 187 { 188 /* 189 * Return as nothing is to be done on waking up from retention. 190 */ 191 if (target_state->pwr_domain_state[ARM_PWR_LVL0] == 192 ARM_LOCAL_STATE_RET) 193 return; 194 195 css_pwr_domain_on_finish(target_state); 196 } 197 198 /******************************************************************************* 199 * Handlers to shutdown/reboot the system 200 ******************************************************************************/ 201 static void __dead2 css_system_off(void) 202 { 203 uint32_t response; 204 205 /* Send the power down request to the SCP */ 206 response = scpi_sys_power_state(scpi_system_shutdown); 207 208 if (response != SCP_OK) { 209 ERROR("CSS System Off: SCP error %u.\n", response); 210 panic(); 211 } 212 wfi(); 213 ERROR("CSS System Off: operation not handled.\n"); 214 panic(); 215 } 216 217 static void __dead2 css_system_reset(void) 218 { 219 uint32_t response; 220 221 /* Send the system reset request to the SCP */ 222 response = scpi_sys_power_state(scpi_system_reboot); 223 224 if (response != SCP_OK) { 225 ERROR("CSS System Reset: SCP error %u.\n", response); 226 panic(); 227 } 228 wfi(); 229 ERROR("CSS System Reset: operation not handled.\n"); 230 panic(); 231 } 232 233 /******************************************************************************* 234 * Handler called when the CPU power domain is about to enter standby. 235 ******************************************************************************/ 236 void css_cpu_standby(plat_local_state_t cpu_state) 237 { 238 unsigned int scr; 239 240 assert(cpu_state == ARM_LOCAL_STATE_RET); 241 242 scr = read_scr_el3(); 243 /* Enable PhysicalIRQ bit for NS world to wake the CPU */ 244 write_scr_el3(scr | SCR_IRQ_BIT); 245 isb(); 246 dsb(); 247 wfi(); 248 249 /* 250 * Restore SCR to the original value, synchronisation of scr_el3 is 251 * done by eret while el3_exit to save some execution cycles. 252 */ 253 write_scr_el3(scr); 254 } 255 256 /******************************************************************************* 257 * Export the platform handlers to enable psci to invoke them 258 ******************************************************************************/ 259 static const plat_psci_ops_t css_ops = { 260 .pwr_domain_on = css_pwr_domain_on, 261 .pwr_domain_on_finish = css_pwr_domain_on_finish, 262 .pwr_domain_off = css_pwr_domain_off, 263 .cpu_standby = css_cpu_standby, 264 .pwr_domain_suspend = css_pwr_domain_suspend, 265 .pwr_domain_suspend_finish = css_pwr_domain_suspend_finish, 266 .system_off = css_system_off, 267 .system_reset = css_system_reset, 268 .validate_power_state = arm_validate_power_state 269 }; 270 271 /******************************************************************************* 272 * Export the platform specific psci ops. 273 ******************************************************************************/ 274 int plat_setup_psci_ops(uintptr_t sec_entrypoint, 275 const plat_psci_ops_t **psci_ops) 276 { 277 *psci_ops = &css_ops; 278 279 wakeup_address = sec_entrypoint; 280 flush_dcache_range((unsigned long)&wakeup_address, 281 sizeof(wakeup_address)); 282 return 0; 283 } 284