1 /* 2 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <arch.h> 8 #include <arch_helpers.h> 9 #include <arm_def.h> 10 #include <assert.h> 11 #include <bl_common.h> 12 #include <console.h> 13 #include <debug.h> 14 #include <mmio.h> 15 #include <plat_arm.h> 16 #include <platform.h> 17 #include <ras.h> 18 #include <utils.h> 19 #include <arm_xlat_tables.h> 20 21 /* 22 * Placeholder variables for copying the arguments that have been passed to 23 * BL31 from BL2. 24 */ 25 static entry_point_info_t bl32_image_ep_info; 26 static entry_point_info_t bl33_image_ep_info; 27 28 /* 29 * Check that BL31_BASE is above ARM_TB_FW_CONFIG_LIMIT. The reserved page 30 * is required for SOC_FW_CONFIG/TOS_FW_CONFIG passed from BL2. 31 */ 32 CASSERT(BL31_BASE >= ARM_TB_FW_CONFIG_LIMIT, assert_bl31_base_overflows); 33 34 /* Weak definitions may be overridden in specific ARM standard platform */ 35 #pragma weak bl31_early_platform_setup2 36 #pragma weak bl31_platform_setup 37 #pragma weak bl31_plat_arch_setup 38 #pragma weak bl31_plat_get_next_image_ep_info 39 40 #define MAP_BL31_TOTAL MAP_REGION_FLAT( \ 41 BL31_BASE, \ 42 BL31_END - BL31_BASE, \ 43 MT_MEMORY | MT_RW | MT_SECURE) 44 #if RECLAIM_INIT_CODE 45 IMPORT_SYM(unsigned long, __INIT_CODE_START__, BL_INIT_CODE_BASE); 46 IMPORT_SYM(unsigned long, __INIT_CODE_END__, BL_INIT_CODE_END); 47 48 #define MAP_BL_INIT_CODE MAP_REGION_FLAT( \ 49 BL_INIT_CODE_BASE, \ 50 BL_INIT_CODE_END \ 51 - BL_INIT_CODE_BASE, \ 52 MT_CODE | MT_SECURE) 53 #endif 54 55 /******************************************************************************* 56 * Return a pointer to the 'entry_point_info' structure of the next image for the 57 * security state specified. BL33 corresponds to the non-secure image type 58 * while BL32 corresponds to the secure image type. A NULL pointer is returned 59 * if the image does not exist. 60 ******************************************************************************/ 61 struct entry_point_info *bl31_plat_get_next_image_ep_info(uint32_t type) 62 { 63 entry_point_info_t *next_image_info; 64 65 assert(sec_state_is_valid(type)); 66 next_image_info = (type == NON_SECURE) 67 ? &bl33_image_ep_info : &bl32_image_ep_info; 68 /* 69 * None of the images on the ARM development platforms can have 0x0 70 * as the entrypoint 71 */ 72 if (next_image_info->pc) 73 return next_image_info; 74 else 75 return NULL; 76 } 77 78 /******************************************************************************* 79 * Perform any BL31 early platform setup common to ARM standard platforms. 80 * Here is an opportunity to copy parameters passed by the calling EL (S-EL1 81 * in BL2 & EL3 in BL1) before they are lost (potentially). This needs to be 82 * done before the MMU is initialized so that the memory layout can be used 83 * while creating page tables. BL2 has flushed this information to memory, so 84 * we are guaranteed to pick up good data. 85 ******************************************************************************/ 86 void __init arm_bl31_early_platform_setup(void *from_bl2, uintptr_t soc_fw_config, 87 uintptr_t hw_config, void *plat_params_from_bl2) 88 { 89 /* Initialize the console to provide early debug support */ 90 arm_console_boot_init(); 91 92 #if RESET_TO_BL31 93 /* There are no parameters from BL2 if BL31 is a reset vector */ 94 assert(from_bl2 == NULL); 95 assert(plat_params_from_bl2 == NULL); 96 97 # ifdef BL32_BASE 98 /* Populate entry point information for BL32 */ 99 SET_PARAM_HEAD(&bl32_image_ep_info, 100 PARAM_EP, 101 VERSION_1, 102 0); 103 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); 104 bl32_image_ep_info.pc = BL32_BASE; 105 bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry(); 106 # endif /* BL32_BASE */ 107 108 /* Populate entry point information for BL33 */ 109 SET_PARAM_HEAD(&bl33_image_ep_info, 110 PARAM_EP, 111 VERSION_1, 112 0); 113 /* 114 * Tell BL31 where the non-trusted software image 115 * is located and the entry state information 116 */ 117 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint(); 118 119 bl33_image_ep_info.spsr = arm_get_spsr_for_bl33_entry(); 120 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); 121 122 # if ARM_LINUX_KERNEL_AS_BL33 123 /* 124 * According to the file ``Documentation/arm64/booting.txt`` of the 125 * Linux kernel tree, Linux expects the physical address of the device 126 * tree blob (DTB) in x0, while x1-x3 are reserved for future use and 127 * must be 0. 128 */ 129 bl33_image_ep_info.args.arg0 = (u_register_t)ARM_PRELOADED_DTB_BASE; 130 bl33_image_ep_info.args.arg1 = 0U; 131 bl33_image_ep_info.args.arg2 = 0U; 132 bl33_image_ep_info.args.arg3 = 0U; 133 # endif 134 135 #else /* RESET_TO_BL31 */ 136 137 /* 138 * In debug builds, we pass a special value in 'plat_params_from_bl2' 139 * to verify platform parameters from BL2 to BL31. 140 * In release builds, it's not used. 141 */ 142 assert(((unsigned long long)plat_params_from_bl2) == 143 ARM_BL31_PLAT_PARAM_VAL); 144 145 /* 146 * Check params passed from BL2 should not be NULL, 147 */ 148 bl_params_t *params_from_bl2 = (bl_params_t *)from_bl2; 149 assert(params_from_bl2 != NULL); 150 assert(params_from_bl2->h.type == PARAM_BL_PARAMS); 151 assert(params_from_bl2->h.version >= VERSION_2); 152 153 bl_params_node_t *bl_params = params_from_bl2->head; 154 155 /* 156 * Copy BL33 and BL32 (if present), entry point information. 157 * They are stored in Secure RAM, in BL2's address space. 158 */ 159 while (bl_params != NULL) { 160 if (bl_params->image_id == BL32_IMAGE_ID) 161 bl32_image_ep_info = *bl_params->ep_info; 162 163 if (bl_params->image_id == BL33_IMAGE_ID) 164 bl33_image_ep_info = *bl_params->ep_info; 165 166 bl_params = bl_params->next_params_info; 167 } 168 169 if (bl33_image_ep_info.pc == 0U) 170 panic(); 171 #endif /* RESET_TO_BL31 */ 172 } 173 174 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 175 u_register_t arg2, u_register_t arg3) 176 { 177 arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3); 178 179 /* 180 * Initialize Interconnect for this cluster during cold boot. 181 * No need for locks as no other CPU is active. 182 */ 183 plat_arm_interconnect_init(); 184 185 /* 186 * Enable Interconnect coherency for the primary CPU's cluster. 187 * Earlier bootloader stages might already do this (e.g. Trusted 188 * Firmware's BL1 does it) but we can't assume so. There is no harm in 189 * executing this code twice anyway. 190 * Platform specific PSCI code will enable coherency for other 191 * clusters. 192 */ 193 plat_arm_interconnect_enter_coherency(); 194 } 195 196 /******************************************************************************* 197 * Perform any BL31 platform setup common to ARM standard platforms 198 ******************************************************************************/ 199 void arm_bl31_platform_setup(void) 200 { 201 /* Initialize the GIC driver, cpu and distributor interfaces */ 202 plat_arm_gic_driver_init(); 203 plat_arm_gic_init(); 204 205 #if RESET_TO_BL31 206 /* 207 * Do initial security configuration to allow DRAM/device access 208 * (if earlier BL has not already done so). 209 */ 210 plat_arm_security_setup(); 211 212 #if defined(PLAT_ARM_MEM_PROT_ADDR) 213 arm_nor_psci_do_dyn_mem_protect(); 214 #endif /* PLAT_ARM_MEM_PROT_ADDR */ 215 216 #endif /* RESET_TO_BL31 */ 217 218 /* Enable and initialize the System level generic timer */ 219 mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF, 220 CNTCR_FCREQ(0U) | CNTCR_EN); 221 222 /* Allow access to the System counter timer module */ 223 arm_configure_sys_timer(); 224 225 /* Initialize power controller before setting up topology */ 226 plat_arm_pwrc_setup(); 227 228 #if RAS_EXTENSION 229 ras_init(); 230 #endif 231 } 232 233 /******************************************************************************* 234 * Perform any BL31 platform runtime setup prior to BL31 exit common to ARM 235 * standard platforms 236 * Perform BL31 platform setup 237 ******************************************************************************/ 238 void arm_bl31_plat_runtime_setup(void) 239 { 240 #if MULTI_CONSOLE_API 241 console_switch_state(CONSOLE_FLAG_RUNTIME); 242 #else 243 console_uninit(); 244 #endif 245 246 /* Initialize the runtime console */ 247 arm_console_runtime_init(); 248 #if RECLAIM_INIT_CODE 249 arm_free_init_memory(); 250 #endif 251 } 252 253 #if RECLAIM_INIT_CODE 254 /* 255 * Zero out and make RW memory used to store image boot time code so it can 256 * be reclaimed during runtime 257 */ 258 void arm_free_init_memory(void) 259 { 260 int ret = xlat_change_mem_attributes(BL_INIT_CODE_BASE, 261 BL_INIT_CODE_END - BL_INIT_CODE_BASE, 262 MT_RW_DATA); 263 264 if (ret != 0) { 265 ERROR("Could not reclaim initialization code"); 266 panic(); 267 } 268 } 269 #endif 270 271 void __init bl31_platform_setup(void) 272 { 273 arm_bl31_platform_setup(); 274 } 275 276 void bl31_plat_runtime_setup(void) 277 { 278 arm_bl31_plat_runtime_setup(); 279 } 280 281 /******************************************************************************* 282 * Perform the very early platform specific architectural setup shared between 283 * ARM standard platforms. This only does basic initialization. Later 284 * architectural setup (bl31_arch_setup()) does not do anything platform 285 * specific. 286 ******************************************************************************/ 287 void __init arm_bl31_plat_arch_setup(void) 288 { 289 const mmap_region_t bl_regions[] = { 290 MAP_BL31_TOTAL, 291 #if RECLAIM_INIT_CODE 292 MAP_BL_INIT_CODE, 293 #endif 294 ARM_MAP_BL_RO, 295 #if USE_ROMLIB 296 ARM_MAP_ROMLIB_CODE, 297 ARM_MAP_ROMLIB_DATA, 298 #endif 299 #if USE_COHERENT_MEM 300 ARM_MAP_BL_COHERENT_RAM, 301 #endif 302 {0} 303 }; 304 305 arm_setup_page_tables(bl_regions, plat_arm_get_mmap()); 306 307 enable_mmu_el3(0); 308 309 arm_setup_romlib(); 310 } 311 312 void __init bl31_plat_arch_setup(void) 313 { 314 arm_bl31_plat_arch_setup(); 315 } 316