14ced5956SRohit Mathew# 24ced5956SRohit Mathew# Copyright (c) 2018-2024, Arm Limited and Contributors. All rights reserved. 34ced5956SRohit Mathew# 44ced5956SRohit Mathew# SPDX-License-Identifier: BSD-3-Clause 54ced5956SRohit Mathew# 64ced5956SRohit Mathew 74ced5956SRohit MathewCSS_USE_SCMI_SDS_DRIVER := 1 84ced5956SRohit Mathew 94ced5956SRohit MathewNRD_COMMON_BASE := plat/arm/board/neoverse_rd/common 104ced5956SRohit Mathew 114ced5956SRohit MathewENABLE_FEAT_RAS := 1 124ced5956SRohit Mathew 134ced5956SRohit MathewSDEI_SUPPORT := 0 144ced5956SRohit Mathew 154ced5956SRohit MathewEL3_EXCEPTION_HANDLING := 0 164ced5956SRohit Mathew 174ced5956SRohit MathewHANDLE_EA_EL3_FIRST_NS := 0 184ced5956SRohit Mathew 19a1e6467bSRohit MathewNRD_CHIP_COUNT := 1 204ced5956SRohit Mathew 21a1e6467bSRohit MathewNRD_PLATFORM_VARIANT := 0 224ced5956SRohit Mathew 234ced5956SRohit Mathew# Do not enable SVE 244ced5956SRohit MathewENABLE_SVE_FOR_NS := 0 254ced5956SRohit Mathew 264ced5956SRohit MathewCTX_INCLUDE_FPREGS := 1 274ced5956SRohit Mathew 284ced5956SRohit MathewINTERCONNECT_SOURCES := ${NRD_COMMON_BASE}/nrd_interconnect.c 294ced5956SRohit Mathew 304ced5956SRohit MathewPLAT_INCLUDES += -I${NRD_COMMON_BASE}/include 314ced5956SRohit Mathew 324ced5956SRohit Mathew# GIC-600 configuration 334ced5956SRohit MathewGICV3_SUPPORT_GIC600 := 1 344ced5956SRohit Mathew 354ced5956SRohit Mathew# Include GICv3 driver files 364ced5956SRohit Mathewinclude drivers/arm/gic/v3/gicv3.mk 374ced5956SRohit Mathew 384ced5956SRohit MathewENT_GIC_SOURCES := ${GICV3_SOURCES} \ 394ced5956SRohit Mathew plat/common/plat_gicv3.c \ 404ced5956SRohit Mathew plat/arm/common/arm_gicv3.c 414ced5956SRohit Mathew 424ced5956SRohit MathewPLAT_BL_COMMON_SOURCES += ${NRD_COMMON_BASE}/arch/aarch64/nrd_helper.S 434ced5956SRohit Mathew 444ced5956SRohit MathewBL1_SOURCES += ${INTERCONNECT_SOURCES} \ 45*8d6fb77aSRohit Mathew ${NRD_COMMON_BASE}/nrd_bl1_setup.c \ 464ced5956SRohit Mathew drivers/arm/sbsa/sbsa.c 474ced5956SRohit Mathew 484ced5956SRohit MathewBL2_SOURCES += ${NRD_COMMON_BASE}/nrd_image_load.c \ 494ced5956SRohit Mathew drivers/arm/css/sds/sds.c 504ced5956SRohit Mathew 514ced5956SRohit MathewBL31_SOURCES += ${INTERCONNECT_SOURCES} \ 524ced5956SRohit Mathew ${ENT_GIC_SOURCES} \ 534ced5956SRohit Mathew ${NRD_COMMON_BASE}/nrd_bl31_setup.c \ 544ced5956SRohit Mathew ${NRD_COMMON_BASE}/nrd_topology.c \ 554ced5956SRohit Mathew drivers/delay_timer/generic_delay_timer.c 564ced5956SRohit Mathew 574ced5956SRohit Mathewifneq (${RESET_TO_BL31},0) 584ced5956SRohit Mathew $(error "Using BL31 as the reset vector is not supported on ${PLAT} platform. \ 594ced5956SRohit Mathew Please set RESET_TO_BL31 to 0.") 604ced5956SRohit Mathewendif 614ced5956SRohit Mathew 62a1e6467bSRohit Mathew$(eval $(call add_define,NRD_CHIP_COUNT)) 634ced5956SRohit Mathew 64a1e6467bSRohit Mathew$(eval $(call add_define,NRD_PLATFORM_VARIANT)) 654ced5956SRohit Mathew 664ced5956SRohit Mathewoverride CSS_LOAD_SCP_IMAGES := 0 674ced5956SRohit Mathewoverride NEED_BL2U := no 684ced5956SRohit Mathewoverride ARM_PLAT_MT := 1 694ced5956SRohit Mathewoverride PSCI_EXTENDED_STATE_ID := 1 704ced5956SRohit Mathewoverride ARM_RECOM_STATE_ID_ENC := 1 714ced5956SRohit Mathew 724ced5956SRohit Mathew# System coherency is managed in hardware 734ced5956SRohit MathewHW_ASSISTED_COHERENCY := 1 744ced5956SRohit Mathew 754ced5956SRohit Mathew# When building for systems with hardware-assisted coherency, there's no need to 764ced5956SRohit Mathew# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too. 774ced5956SRohit MathewUSE_COHERENT_MEM := 0 784ced5956SRohit Mathew 794ced5956SRohit Mathewinclude plat/arm/common/arm_common.mk 804ced5956SRohit Mathewinclude plat/arm/css/common/css_common.mk 814ced5956SRohit Mathewinclude plat/arm/board/common/board_common.mk 82