1# 2# Copyright (c) 2018-2022, Arm Limited. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7 8N1SDP_BASE := plat/arm/board/n1sdp 9 10INTERCONNECT_SOURCES := ${N1SDP_BASE}/n1sdp_interconnect.c 11 12PLAT_INCLUDES := -I${N1SDP_BASE}/include 13 14 15N1SDP_CPU_SOURCES := lib/cpus/aarch64/neoverse_n1.S 16 17# GIC-600 configuration 18GICV3_SUPPORT_GIC600 := 1 19GICV3_IMPL_GIC600_MULTICHIP := 1 20 21# Include GICv3 driver files 22include drivers/arm/gic/v3/gicv3.mk 23 24N1SDP_GIC_SOURCES := ${GICV3_SOURCES} \ 25 plat/common/plat_gicv3.c \ 26 plat/arm/common/arm_gicv3.c \ 27 28PLAT_BL_COMMON_SOURCES := ${N1SDP_BASE}/n1sdp_plat.c \ 29 ${N1SDP_BASE}/aarch64/n1sdp_helper.S 30 31BL1_SOURCES := ${N1SDP_CPU_SOURCES} \ 32 ${INTERCONNECT_SOURCES} \ 33 ${N1SDP_BASE}/n1sdp_err.c \ 34 ${N1SDP_BASE}/n1sdp_trusted_boot.c \ 35 ${N1SDP_BASE}/n1sdp_bl1_setup.c \ 36 drivers/arm/sbsa/sbsa.c 37 38BL2_SOURCES := ${N1SDP_BASE}/n1sdp_security.c \ 39 ${N1SDP_BASE}/n1sdp_err.c \ 40 ${N1SDP_BASE}/n1sdp_trusted_boot.c \ 41 lib/utils/mem_region.c \ 42 ${N1SDP_BASE}/n1sdp_bl2_setup.c \ 43 ${N1SDP_BASE}/n1sdp_image_load.c \ 44 drivers/arm/css/sds/sds.c 45 46BL31_SOURCES := ${N1SDP_CPU_SOURCES} \ 47 ${INTERCONNECT_SOURCES} \ 48 ${N1SDP_GIC_SOURCES} \ 49 ${N1SDP_BASE}/n1sdp_bl31_setup.c \ 50 ${N1SDP_BASE}/n1sdp_topology.c \ 51 ${N1SDP_BASE}/n1sdp_security.c \ 52 drivers/arm/css/sds/sds.c 53 54FDT_SOURCES += fdts/${PLAT}-single-chip.dts \ 55 fdts/${PLAT}-multi-chip.dts \ 56 ${N1SDP_BASE}/fdts/n1sdp_fw_config.dts \ 57 ${N1SDP_BASE}/fdts/n1sdp_tb_fw_config.dts \ 58 ${N1SDP_BASE}/fdts/n1sdp_nt_fw_config.dts 59 60FW_CONFIG := ${BUILD_PLAT}/fdts/n1sdp_fw_config.dtb 61TB_FW_CONFIG := ${BUILD_PLAT}/fdts/n1sdp_tb_fw_config.dtb 62NT_FW_CONFIG := ${BUILD_PLAT}/fdts/n1sdp_nt_fw_config.dtb 63 64# Add the FW_CONFIG to FIP and specify the same to certtool 65$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG})) 66# Add the TB_FW_CONFIG to FIP and specify the same to certtool 67$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG})) 68# Add the NT_FW_CONFIG to FIP and specify the same to certtool 69$(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config,${NT_FW_CONFIG})) 70 71# Setting to 0 as no NVCTR in N1SDP 72N1SDP_FW_NVCTR_VAL := 0 73TFW_NVCTR_VAL := ${N1SDP_FW_NVCTR_VAL} 74NTFW_NVCTR_VAL := ${N1SDP_FW_NVCTR_VAL} 75 76# Add N1SDP_FW_NVCTR_VAL 77$(eval $(call add_define,N1SDP_FW_NVCTR_VAL)) 78 79# TF-A not required to load the SCP Images 80override CSS_LOAD_SCP_IMAGES := 0 81 82override NEED_BL2U := no 83 84# 32 bit mode not supported 85override CTX_INCLUDE_AARCH32_REGS := 0 86 87override ARM_PLAT_MT := 1 88 89# Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the 90# SCP during power management operations and for SCP RAM Firmware transfer. 91CSS_USE_SCMI_SDS_DRIVER := 1 92 93# System coherency is managed in hardware 94HW_ASSISTED_COHERENCY := 1 95 96# When building for systems with hardware-assisted coherency, there's no need to 97# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too. 98USE_COHERENT_MEM := 0 99 100# Enable the flag since N1SDP has a system level cache 101NEOVERSE_Nx_EXTERNAL_LLC := 1 102include plat/arm/common/arm_common.mk 103include plat/arm/css/common/css_common.mk 104include plat/arm/board/common/board_common.mk 105