1# 2# Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7 8N1SDP_BASE := plat/arm/board/n1sdp 9 10INTERCONNECT_SOURCES := ${N1SDP_BASE}/n1sdp_interconnect.c 11 12PLAT_INCLUDES := -I${N1SDP_BASE}/include 13 14 15N1SDP_CPU_SOURCES := lib/cpus/aarch64/neoverse_n1.S 16 17 18N1SDP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 19 drivers/arm/gic/v3/gicv3_main.c \ 20 drivers/arm/gic/v3/gicv3_helpers.c \ 21 drivers/arm/gic/v3/gic600_multichip.c \ 22 plat/common/plat_gicv3.c \ 23 plat/arm/common/arm_gicv3.c \ 24 drivers/arm/gic/v3/gic600.c 25 26PLAT_BL_COMMON_SOURCES := ${N1SDP_BASE}/n1sdp_plat.c \ 27 ${N1SDP_BASE}/aarch64/n1sdp_helper.S 28 29BL1_SOURCES += drivers/arm/sbsa/sbsa.c 30 31BL31_SOURCES := ${N1SDP_CPU_SOURCES} \ 32 ${INTERCONNECT_SOURCES} \ 33 ${N1SDP_GIC_SOURCES} \ 34 ${N1SDP_BASE}/n1sdp_bl31_setup.c \ 35 ${N1SDP_BASE}/n1sdp_topology.c \ 36 ${N1SDP_BASE}/n1sdp_security.c \ 37 drivers/arm/css/sds/sds.c 38 39 40# TF-A not required to load the SCP Images 41override CSS_LOAD_SCP_IMAGES := 0 42 43# BL1/BL2 Image not a part of the capsule Image for n1sdp 44override NEED_BL1 := no 45override NEED_BL2 := no 46override NEED_BL2U := no 47 48#TFA for n1sdp starts from BL31 49override RESET_TO_BL31 := 1 50 51# 32 bit mode not supported 52override CTX_INCLUDE_AARCH32_REGS := 0 53 54override ARM_PLAT_MT := 1 55 56# Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the 57# SCP during power management operations and for SCP RAM Firmware transfer. 58CSS_USE_SCMI_SDS_DRIVER := 1 59 60# System coherency is managed in hardware 61HW_ASSISTED_COHERENCY := 1 62 63# When building for systems with hardware-assisted coherency, there's no need to 64# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too. 65USE_COHERENT_MEM := 0 66include plat/arm/common/arm_common.mk 67include plat/arm/css/common/css_common.mk 68include plat/arm/board/common/board_common.mk 69 70