1*80d37c28SDeepak Pandey# 2*80d37c28SDeepak Pandey# Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. 3*80d37c28SDeepak Pandey# 4*80d37c28SDeepak Pandey# SPDX-License-Identifier: BSD-3-Clause 5*80d37c28SDeepak Pandey# 6*80d37c28SDeepak Pandey 7*80d37c28SDeepak Pandey 8*80d37c28SDeepak PandeyN1SDP_BASE := plat/arm/board/n1sdp 9*80d37c28SDeepak Pandey 10*80d37c28SDeepak PandeyINTERCONNECT_SOURCES := ${N1SDP_BASE}/n1sdp_interconnect.c 11*80d37c28SDeepak Pandey 12*80d37c28SDeepak PandeyPLAT_INCLUDES := -I${N1SDP_BASE}/include 13*80d37c28SDeepak Pandey 14*80d37c28SDeepak Pandey 15*80d37c28SDeepak PandeyN1SDP_CPU_SOURCES := lib/cpus/aarch64/cortex_ares.S 16*80d37c28SDeepak Pandey 17*80d37c28SDeepak Pandey 18*80d37c28SDeepak PandeyN1SDP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 19*80d37c28SDeepak Pandey drivers/arm/gic/v3/gicv3_main.c \ 20*80d37c28SDeepak Pandey drivers/arm/gic/v3/gicv3_helpers.c \ 21*80d37c28SDeepak Pandey plat/common/plat_gicv3.c \ 22*80d37c28SDeepak Pandey plat/arm/common/arm_gicv3.c \ 23*80d37c28SDeepak Pandey drivers/arm/gic/v3/gic600.c 24*80d37c28SDeepak Pandey 25*80d37c28SDeepak PandeyPLAT_BL_COMMON_SOURCES := ${N1SDP_BASE}/n1sdp_plat.c \ 26*80d37c28SDeepak Pandey ${N1SDP_BASE}/aarch64/n1sdp_helper.S 27*80d37c28SDeepak Pandey 28*80d37c28SDeepak Pandey 29*80d37c28SDeepak PandeyBL31_SOURCES := ${N1SDP_CPU_SOURCES} \ 30*80d37c28SDeepak Pandey ${INTERCONNECT_SOURCES} \ 31*80d37c28SDeepak Pandey ${N1SDP_GIC_SOURCES} \ 32*80d37c28SDeepak Pandey ${N1SDP_BASE}/n1sdp_bl31_setup.c \ 33*80d37c28SDeepak Pandey ${N1SDP_BASE}/n1sdp_topology.c \ 34*80d37c28SDeepak Pandey ${N1SDP_BASE}/n1sdp_security.c 35*80d37c28SDeepak Pandey 36*80d37c28SDeepak Pandey 37*80d37c28SDeepak Pandey# TF-A not required to load the SCP Images 38*80d37c28SDeepak Pandeyoverride CSS_LOAD_SCP_IMAGES := 0 39*80d37c28SDeepak Pandey 40*80d37c28SDeepak Pandey# BL1/BL2 Image not a part of the capsule Image for n1sdp 41*80d37c28SDeepak Pandeyoverride NEED_BL1 := no 42*80d37c28SDeepak Pandeyoverride NEED_BL2 := no 43*80d37c28SDeepak Pandeyoverride NEED_BL2U := no 44*80d37c28SDeepak Pandey 45*80d37c28SDeepak Pandey#TFA for n1sdp starts from BL31 46*80d37c28SDeepak Pandeyoverride RESET_TO_BL31 := 1 47*80d37c28SDeepak Pandey 48*80d37c28SDeepak Pandey# 32 bit mode not supported 49*80d37c28SDeepak Pandeyoverride CTX_INCLUDE_AARCH32_REGS := 0 50*80d37c28SDeepak Pandey 51*80d37c28SDeepak Pandeyoverride ARM_PLAT_MT := 1 52*80d37c28SDeepak Pandey 53*80d37c28SDeepak Pandey# Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the 54*80d37c28SDeepak Pandey# SCP during power management operations and for SCP RAM Firmware transfer. 55*80d37c28SDeepak PandeyCSS_USE_SCMI_SDS_DRIVER := 1 56*80d37c28SDeepak Pandey 57*80d37c28SDeepak Pandey# System coherency is managed in hardware 58*80d37c28SDeepak PandeyHW_ASSISTED_COHERENCY := 1 59*80d37c28SDeepak Pandey 60*80d37c28SDeepak Pandey# When building for systems with hardware-assisted coherency, there's no need to 61*80d37c28SDeepak Pandey# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too. 62*80d37c28SDeepak PandeyUSE_COHERENT_MEM := 0 63*80d37c28SDeepak Pandeyinclude plat/arm/common/arm_common.mk 64*80d37c28SDeepak Pandeyinclude plat/arm/css/common/css_common.mk 65*80d37c28SDeepak Pandeyinclude plat/arm/soc/common/soc_css.mk 66*80d37c28SDeepak Pandeyinclude plat/arm/board/common/board_common.mk 67*80d37c28SDeepak Pandey 68