1 /* 2 * Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <drivers/arm/css/css_mhu_doorbell.h> 8 #include <drivers/arm/css/scmi.h> 9 #include <plat/arm/common/plat_arm.h> 10 #include <plat/arm/css/common/css_pm.h> 11 #include <plat/common/platform.h> 12 #include <platform_def.h> 13 14 #if CSS_USE_SCMI_SDS_DRIVER 15 static scmi_channel_plat_info_t juno_scmi_plat_info = { 16 .scmi_mbx_mem = CSS_SCMI_PAYLOAD_BASE, 17 .db_reg_addr = PLAT_CSS_MHU_BASE + CSS_SCMI_MHU_DB_REG_OFF, 18 .db_preserve_mask = 0xfffffffe, 19 .db_modify_mask = 0x1, 20 .ring_doorbell = &mhu_ring_doorbell, 21 }; 22 23 scmi_channel_plat_info_t *plat_css_get_scmi_info(unsigned int channel_id) 24 { 25 return &juno_scmi_plat_info; 26 } 27 28 #endif 29 /* 30 * On Juno, the system power level is the highest power level. 31 * The first entry in the power domain descriptor specifies the 32 * number of system power domains i.e. 1. 33 */ 34 #define JUNO_PWR_DOMAINS_AT_MAX_PWR_LVL ARM_SYSTEM_COUNT 35 36 /* 37 * The Juno power domain tree descriptor. The cluster power domains 38 * are arranged so that when the PSCI generic code creates the power 39 * domain tree, the indices of the CPU power domain nodes it allocates 40 * match the linear indices returned by plat_core_pos_by_mpidr() 41 * i.e. CLUSTER1 CPUs are allocated indices from 0 to 3 and the higher 42 * indices for CLUSTER0 CPUs. 43 */ 44 static const unsigned char juno_power_domain_tree_desc[] = { 45 /* No of root nodes */ 46 JUNO_PWR_DOMAINS_AT_MAX_PWR_LVL, 47 /* No of children for the root node */ 48 JUNO_CLUSTER_COUNT, 49 /* No of children for the first cluster node */ 50 JUNO_CLUSTER1_CORE_COUNT, 51 /* No of children for the second cluster node */ 52 JUNO_CLUSTER0_CORE_COUNT 53 }; 54 55 /******************************************************************************* 56 * This function returns the Juno topology tree information. 57 ******************************************************************************/ 58 const unsigned char *plat_get_power_domain_tree_desc(void) 59 { 60 return juno_power_domain_tree_desc; 61 } 62 63 /******************************************************************************* 64 * This function returns the core count within the cluster corresponding to 65 * `mpidr`. 66 ******************************************************************************/ 67 unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr) 68 { 69 return (((mpidr & (u_register_t) 0x100) != 0U) ? 70 JUNO_CLUSTER1_CORE_COUNT : JUNO_CLUSTER0_CORE_COUNT); 71 } 72 73 /* 74 * The array mapping platform core position (implemented by plat_my_core_pos()) 75 * to the SCMI power domain ID implemented by SCP. 76 */ 77 const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[PLATFORM_CORE_COUNT] = { 78 2, 3, 4, 5, 0, 1 }; 79