1 /* 2 * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <arm_def.h> 8 #include <css_pm.h> 9 #include <plat_arm.h> 10 #include <platform.h> 11 #include "juno_def.h" 12 #include "../../css/drivers/scmi/scmi.h" 13 #include "../../css/drivers/mhu/css_mhu_doorbell.h" 14 15 static scmi_channel_plat_info_t juno_scmi_plat_info = { 16 .scmi_mbx_mem = CSS_SCMI_PAYLOAD_BASE, 17 .db_reg_addr = PLAT_CSS_MHU_BASE + CSS_SCMI_MHU_DB_REG_OFF, 18 .db_preserve_mask = 0xfffffffe, 19 .db_modify_mask = 0x1, 20 .ring_doorbell = &mhu_ring_doorbell, 21 }; 22 23 scmi_channel_plat_info_t *plat_css_get_scmi_info() 24 { 25 return &juno_scmi_plat_info; 26 } 27 28 /* 29 * On Juno, the system power level is the highest power level. 30 * The first entry in the power domain descriptor specifies the 31 * number of system power domains i.e. 1. 32 */ 33 #define JUNO_PWR_DOMAINS_AT_MAX_PWR_LVL ARM_SYSTEM_COUNT 34 35 /* 36 * The Juno power domain tree descriptor. The cluster power domains 37 * are arranged so that when the PSCI generic code creates the power 38 * domain tree, the indices of the CPU power domain nodes it allocates 39 * match the linear indices returned by plat_core_pos_by_mpidr() 40 * i.e. CLUSTER1 CPUs are allocated indices from 0 to 3 and the higher 41 * indices for CLUSTER0 CPUs. 42 */ 43 static const unsigned char juno_power_domain_tree_desc[] = { 44 /* No of root nodes */ 45 JUNO_PWR_DOMAINS_AT_MAX_PWR_LVL, 46 /* No of children for the root node */ 47 JUNO_CLUSTER_COUNT, 48 /* No of children for the first cluster node */ 49 JUNO_CLUSTER1_CORE_COUNT, 50 /* No of children for the second cluster node */ 51 JUNO_CLUSTER0_CORE_COUNT 52 }; 53 54 /******************************************************************************* 55 * This function returns the Juno topology tree information. 56 ******************************************************************************/ 57 const unsigned char *plat_get_power_domain_tree_desc(void) 58 { 59 return juno_power_domain_tree_desc; 60 } 61 62 /******************************************************************************* 63 * This function returns the core count within the cluster corresponding to 64 * `mpidr`. 65 ******************************************************************************/ 66 unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr) 67 { 68 return (((mpidr & (u_register_t) 0x100) != 0U) ? 69 JUNO_CLUSTER1_CORE_COUNT : JUNO_CLUSTER0_CORE_COUNT); 70 } 71 72 /* 73 * The array mapping platform core position (implemented by plat_my_core_pos()) 74 * to the SCMI power domain ID implemented by SCP. 75 */ 76 const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[PLATFORM_CORE_COUNT] = { 77 2, 3, 4, 5, 0, 1 }; 78