xref: /rk3399_ARM-atf/plat/arm/board/juno/juno_topology.c (revision 1a29aba3673b753664e97fcfed1e3d38f138b3b7)
1 /*
2  * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <arm_def.h>
8 #include <css_pm.h>
9 #include <plat_arm.h>
10 #include <platform.h>
11 #include "juno_def.h"
12 
13 /*
14  * On Juno, the system power level is the highest power level.
15  * The first entry in the power domain descriptor specifies the
16  * number of system power domains i.e. 1.
17  */
18 #define JUNO_PWR_DOMAINS_AT_MAX_PWR_LVL	 ARM_SYSTEM_COUNT
19 
20 /*
21  * The Juno power domain tree descriptor. The cluster power domains
22  * are arranged so that when the PSCI generic code creates the power
23  * domain tree, the indices of the CPU power domain nodes it allocates
24  * match the linear indices returned by plat_core_pos_by_mpidr()
25  * i.e. CLUSTER1 CPUs are allocated indices from 0 to 3 and the higher
26  * indices for CLUSTER0 CPUs.
27  */
28 static const unsigned char juno_power_domain_tree_desc[] = {
29 	/* No of root nodes */
30 	JUNO_PWR_DOMAINS_AT_MAX_PWR_LVL,
31 	/* No of children for the root node */
32 	JUNO_CLUSTER_COUNT,
33 	/* No of children for the first cluster node */
34 	JUNO_CLUSTER1_CORE_COUNT,
35 	/* No of children for the second cluster node */
36 	JUNO_CLUSTER0_CORE_COUNT
37 };
38 
39 /*******************************************************************************
40  * This function returns the Juno topology tree information.
41  ******************************************************************************/
42 const unsigned char *plat_get_power_domain_tree_desc(void)
43 {
44 	return juno_power_domain_tree_desc;
45 }
46 
47 /*******************************************************************************
48  * This function returns the core count within the cluster corresponding to
49  * `mpidr`.
50  ******************************************************************************/
51 unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr)
52 {
53 	return (((mpidr & (u_register_t) 0x100) != 0U) ?
54 			JUNO_CLUSTER1_CORE_COUNT : JUNO_CLUSTER0_CORE_COUNT);
55 }
56 
57 /*
58  * The array mapping platform core position (implemented by plat_my_core_pos())
59  * to the SCMI power domain ID implemented by SCP.
60  */
61 const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[PLATFORM_CORE_COUNT] = {
62 			2, 3, 4, 5, 0, 1 };
63