xref: /rk3399_ARM-atf/plat/arm/board/juno/juno_common.c (revision 2c5cde247bb5865b3f3bd0fbe11aed7e952737fd)
1 /*
2  * Copyright (c) 2015-2025, Arm Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <drivers/arm/css/sds.h>
8 #include <lib/smccc.h>
9 #include <lib/utils_def.h>
10 #include <services/arm_arch_svc.h>
11 
12 #include <plat/arm/common/plat_arm.h>
13 #include <platform_def.h>
14 
15 /*
16  * Table of memory regions for different BL stages to map using the MMU.
17  * This doesn't include Trusted SRAM as setup_page_tables() already takes care
18  * of mapping it.
19  */
20 #ifdef IMAGE_BL1
21 const mmap_region_t plat_arm_mmap[] = {
22 	ARM_MAP_SHARED_RAM,
23 	V2M_MAP_FLASH0_RW,
24 	V2M_MAP_IOFPGA,
25 	CSS_MAP_DEVICE,
26 	SOC_CSS_MAP_DEVICE,
27 #if TRUSTED_BOARD_BOOT
28 	/* Map DRAM to authenticate NS_BL2U image. */
29 	ARM_MAP_NS_DRAM1,
30 #endif
31 	{0}
32 };
33 #endif
34 #ifdef IMAGE_BL2
35 const mmap_region_t plat_arm_mmap[] = {
36 	ARM_MAP_SHARED_RAM,
37 	V2M_MAP_FLASH0_RW,
38 #ifdef PLAT_ARM_MEM_PROT_ADDR
39 	ARM_V2M_MAP_MEM_PROTECT,
40 #endif
41 	V2M_MAP_IOFPGA,
42 	CSS_MAP_DEVICE,
43 	SOC_CSS_MAP_DEVICE,
44 	ARM_MAP_NS_DRAM1,
45 #ifdef __aarch64__
46 	ARM_MAP_DRAM2,
47 #endif
48 #ifdef SPD_tspd
49 	ARM_MAP_TSP_SEC_MEM,
50 #endif
51 #ifdef SPD_opteed
52 	ARM_MAP_OPTEE_CORE_MEM,
53 	ARM_OPTEE_PAGEABLE_LOAD_MEM,
54 #endif
55 #if CRYPTO_SUPPORT && !RESET_TO_BL2
56 	/*
57 	 * To access shared the Mbed TLS heap while booting the
58 	 * system with Crypto support
59 	 */
60 	ARM_MAP_BL1_RW,
61 #endif
62 #ifdef JUNO_ETHOSN_TZMP1
63 	JUNO_ETHOSN_PROT_FW_RW,
64 #endif
65 #if SPMC_AT_EL3
66 	ARM_SP_IMAGE_MMAP,
67 #endif
68 	{0}
69 };
70 #endif
71 #ifdef IMAGE_BL2U
72 const mmap_region_t plat_arm_mmap[] = {
73 	ARM_MAP_SHARED_RAM,
74 	CSS_MAP_DEVICE,
75 	CSS_MAP_SCP_BL2U,
76 	V2M_MAP_IOFPGA,
77 	SOC_CSS_MAP_DEVICE,
78 	{0}
79 };
80 #endif
81 #ifdef IMAGE_BL31
82 const mmap_region_t plat_arm_mmap[] = {
83 	ARM_MAP_SHARED_RAM,
84 	V2M_MAP_IOFPGA,
85 	CSS_MAP_DEVICE,
86 #ifdef PLAT_ARM_MEM_PROT_ADDR
87 	ARM_V2M_MAP_MEM_PROTECT,
88 #endif
89 	SOC_CSS_MAP_DEVICE,
90 	ARM_DTB_DRAM_NS,
91 #ifdef JUNO_ETHOSN_TZMP1
92 	JUNO_ETHOSN_PROT_FW_RO,
93 #endif
94 #ifdef JUNO_MAP_FW_NS_HANDOFF
95 	JUNO_MAP_FW_NS_HANDOFF,
96 #endif
97 #if defined(JUNO_MAP_EL3_FW_HANDOFF) && !RESET_TO_BL31
98 	JUNO_MAP_EL3_FW_HANDOFF,
99 #endif
100 	{0}
101 };
102 #endif
103 #ifdef IMAGE_BL32
104 const mmap_region_t plat_arm_mmap[] = {
105 #ifndef __aarch64__
106 	ARM_MAP_SHARED_RAM,
107 #ifdef PLAT_ARM_MEM_PROT_ADDR
108 	ARM_V2M_MAP_MEM_PROTECT,
109 #endif
110 #endif
111 	V2M_MAP_IOFPGA,
112 	CSS_MAP_DEVICE,
113 	SOC_CSS_MAP_DEVICE,
114 	{0}
115 };
116 #endif
117 
118 ARM_CASSERT_MMAP
119 
120 /*****************************************************************************
121  * plat_is_smccc_feature_available() - This function checks whether SMCCC
122  *                                     feature is availabile for platform.
123  * @fid: SMCCC function id
124  *
125  * Return SMC_ARCH_CALL_SUCCESS if SMCCC feature is available and
126  * SMC_ARCH_CALL_NOT_SUPPORTED otherwise.
127  *****************************************************************************/
plat_is_smccc_feature_available(u_register_t fid)128 int32_t plat_is_smccc_feature_available(u_register_t fid)
129 {
130 	switch (fid) {
131 	case SMCCC_ARCH_SOC_ID:
132 		return SMC_ARCH_CALL_SUCCESS;
133 	default:
134 		return SMC_ARCH_CALL_NOT_SUPPORTED;
135 	}
136 }
137 
138 /* Get SOC version */
plat_get_soc_version(void)139 int32_t plat_get_soc_version(void)
140 {
141 	return (int32_t)
142 		(SOC_ID_SET_JEP_106(ARM_SOC_CONTINUATION_CODE,
143 				    ARM_SOC_IDENTIFICATION_CODE) |
144 		 (JUNO_SOC_ID & SOC_ID_IMPL_DEF_MASK));
145 }
146 
147 /* Get SOC revision */
plat_get_soc_revision(void)148 int32_t plat_get_soc_revision(void)
149 {
150 	unsigned int sys_id;
151 
152 	sys_id = mmio_read_32(V2M_SYSREGS_BASE + V2M_SYS_ID);
153 	return (int32_t)(((sys_id >> V2M_SYS_ID_REV_SHIFT) &
154 			  V2M_SYS_ID_REV_MASK) & SOC_ID_REV_MASK);
155 }
156 
157 #if CSS_USE_SCMI_SDS_DRIVER
158 static sds_region_desc_t juno_sds_regions[] = {
159 	{ .base = PLAT_ARM_SDS_MEM_BASE },
160 };
161 
plat_sds_get_regions(unsigned int * region_count)162 sds_region_desc_t *plat_sds_get_regions(unsigned int *region_count)
163 {
164 	*region_count = ARRAY_SIZE(juno_sds_regions);
165 
166 	return juno_sds_regions;
167 }
168 #endif /* CSS_USE_SCMI_SDS_DRIVER */
169 
170 #if CRYPTO_SUPPORT
plat_get_mbedtls_heap(void ** heap_addr,size_t * heap_size)171 int plat_get_mbedtls_heap(void **heap_addr, size_t *heap_size)
172 {
173 	assert(heap_addr != NULL);
174 	assert(heap_size != NULL);
175 
176 	return arm_get_mbedtls_heap(heap_addr, heap_size);
177 }
178 #endif
179