xref: /rk3399_ARM-atf/plat/arm/board/juno/juno_bl2_setup.c (revision 7bba6884a0112ec38ad5992b1eb3f0398abf5cf7)
1 /*
2  * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <assert.h>
8 #include <bl_common.h>
9 #include <desc_image_load.h>
10 #include <plat_arm.h>
11 
12 #if JUNO_AARCH32_EL3_RUNTIME
13 /*******************************************************************************
14  * This function changes the spsr for BL32 image to bypass
15  * the check in BL1 AArch64 exception handler. This is needed in the aarch32
16  * boot flow as the core comes up in aarch64 and to enter the BL32 image a warm
17  * reset in aarch32 state is required.
18  ******************************************************************************/
19 int bl2_plat_handle_post_image_load(unsigned int image_id)
20 {
21 	int err = arm_bl2_handle_post_image_load(image_id);
22 
23 	if (!err && (image_id == BL32_IMAGE_ID)) {
24 		bl_mem_params_node_t *bl_mem_params = get_bl_mem_params_node(image_id);
25 		assert(bl_mem_params);
26 		bl_mem_params->ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
27 			DISABLE_ALL_EXCEPTIONS);
28 	}
29 
30 	return err;
31 }
32 
33 /*
34  * We need to override some of the platform functions when booting SP_MIN
35  * on Juno AArch32.
36  */
37 
38 static unsigned int scp_boot_config;
39 
40 void bl2_early_platform_setup(meminfo_t *mem_layout)
41 {
42 	arm_bl2_early_platform_setup(mem_layout);
43 
44 	/* Save SCP Boot config before it gets overwritten by SCP_BL2 loading */
45 	VERBOSE("BL2: Saving SCP Boot config = 0x%x\n", scp_boot_config);
46 	scp_boot_config = mmio_read_32(SCP_BOOT_CFG_ADDR);
47 }
48 
49 void bl2_platform_setup(void)
50 {
51 	arm_bl2_platform_setup();
52 
53 	mmio_write_32(SCP_BOOT_CFG_ADDR, scp_boot_config);
54 	VERBOSE("BL2: Restored SCP Boot config = 0x%x\n", scp_boot_config);
55 }
56 #endif /* JUNO_AARCH32_EL3_RUNTIME */
57