107570d59SYatharth Kochar /* 2cc47e1adSDimitris Papastamos * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved. 307570d59SYatharth Kochar * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 507570d59SYatharth Kochar */ 607570d59SYatharth Kochar 707570d59SYatharth Kochar #include <assert.h> 8*09d40e0eSAntonio Nino Diaz 9*09d40e0eSAntonio Nino Diaz #include <common/bl_common.h> 10*09d40e0eSAntonio Nino Diaz #include <common/desc_image_load.h> 11*09d40e0eSAntonio Nino Diaz 1207570d59SYatharth Kochar #include <plat_arm.h> 1307570d59SYatharth Kochar 1407570d59SYatharth Kochar #if JUNO_AARCH32_EL3_RUNTIME 1507570d59SYatharth Kochar /******************************************************************************* 1607570d59SYatharth Kochar * This function changes the spsr for BL32 image to bypass 1707570d59SYatharth Kochar * the check in BL1 AArch64 exception handler. This is needed in the aarch32 1807570d59SYatharth Kochar * boot flow as the core comes up in aarch64 and to enter the BL32 image a warm 1907570d59SYatharth Kochar * reset in aarch32 state is required. 2007570d59SYatharth Kochar ******************************************************************************/ 21490eeb04SDaniel Boulby int arm_bl2_plat_handle_post_image_load(unsigned int image_id) 2207570d59SYatharth Kochar { 2307570d59SYatharth Kochar int err = arm_bl2_handle_post_image_load(image_id); 2407570d59SYatharth Kochar 2507570d59SYatharth Kochar if (!err && (image_id == BL32_IMAGE_ID)) { 2607570d59SYatharth Kochar bl_mem_params_node_t *bl_mem_params = get_bl_mem_params_node(image_id); 2707570d59SYatharth Kochar assert(bl_mem_params); 2807570d59SYatharth Kochar bl_mem_params->ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX, 2907570d59SYatharth Kochar DISABLE_ALL_EXCEPTIONS); 3007570d59SYatharth Kochar } 3107570d59SYatharth Kochar 3207570d59SYatharth Kochar return err; 3307570d59SYatharth Kochar } 3407570d59SYatharth Kochar #endif /* JUNO_AARCH32_EL3_RUNTIME */ 35