1 /* 2 * Copyright (c) 2022-2025, Arm Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 * This file just contains demonstration code, to "handle" RNG traps. 7 */ 8 9 #include <stdbool.h> 10 11 #include <arch.h> 12 #include <arch_helpers.h> 13 #include <bl31/sync_handle.h> 14 #include <context.h> 15 16 /* 17 * This emulation code here is not very meaningful: enabling the RNG 18 * trap typically happens for a reason, so just calling the actual 19 * hardware instructions might not be useful or even possible. 20 */ plat_handle_rng_trap(uint64_t esr_el3,cpu_context_t * ctx)21int plat_handle_rng_trap(uint64_t esr_el3, cpu_context_t *ctx) 22 { 23 /* extract the target register number from the exception syndrome */ 24 unsigned int rt = get_sysreg_iss_rt(esr_el3); 25 26 /* ignore XZR accesses and writes to the register */ 27 if (rt == 31 || is_sysreg_iss_write(esr_el3)) { 28 return TRAP_RET_CONTINUE; 29 } 30 31 if ((esr_el3 & ISS_SYSREG_OPCODE_MASK) == ISS_SYSREG_OPCODE_RNDR) { 32 ctx->gpregs_ctx.ctx_regs[rt] = read_rndr(); 33 } else { 34 ctx->gpregs_ctx.ctx_regs[rt] = read_rndrrs(); 35 } 36 37 /* 38 * We successfully handled the trap, continue with the next 39 * instruction. 40 */ 41 return TRAP_RET_CONTINUE; 42 } 43