1*d38c64d2SGovindraj Raja /* 2*d38c64d2SGovindraj Raja * Copyright (c) 2024, ARM Limited and Contributors. All rights reserved. 3*d38c64d2SGovindraj Raja * 4*d38c64d2SGovindraj Raja * SPDX-License-Identifier: BSD-3-Clause 5*d38c64d2SGovindraj Raja */ 6*d38c64d2SGovindraj Raja 7*d38c64d2SGovindraj Raja #if __aarch64__ 8*d38c64d2SGovindraj Raja 9*d38c64d2SGovindraj Raja #include <aem_generic.h> 10*d38c64d2SGovindraj Raja #include <arch_helpers.h> 11*d38c64d2SGovindraj Raja #include <cortex_a35.h> 12*d38c64d2SGovindraj Raja #include <cortex_a53.h> 13*d38c64d2SGovindraj Raja #include <cortex_a57.h> 14*d38c64d2SGovindraj Raja #include <cortex_a72.h> 15*d38c64d2SGovindraj Raja #include <cortex_a73.h> 16*d38c64d2SGovindraj Raja #include <cortex_a78_ae.h> 17*d38c64d2SGovindraj Raja #include <drivers/arm/fvp/fvp_cpu_pwr.h> 18*d38c64d2SGovindraj Raja #include <lib/utils_def.h> 19*d38c64d2SGovindraj Raja #include <neoverse_e1.h> 20*d38c64d2SGovindraj Raja 21*d38c64d2SGovindraj Raja bool check_cpupwrctrl_el1_is_available(void) 22*d38c64d2SGovindraj Raja { 23*d38c64d2SGovindraj Raja /* Poupulate list of CPU midr that doesn't support CPUPWRCTL_EL1 */ 24*d38c64d2SGovindraj Raja const unsigned int midr_no_cpupwrctl[] = { 25*d38c64d2SGovindraj Raja BASE_AEM_MIDR, 26*d38c64d2SGovindraj Raja CORTEX_A35_MIDR, 27*d38c64d2SGovindraj Raja CORTEX_A53_MIDR, 28*d38c64d2SGovindraj Raja CORTEX_A57_MIDR, 29*d38c64d2SGovindraj Raja CORTEX_A72_MIDR, 30*d38c64d2SGovindraj Raja CORTEX_A73_MIDR, 31*d38c64d2SGovindraj Raja CORTEX_A78_AE_MIDR, 32*d38c64d2SGovindraj Raja NEOVERSE_E1_MIDR 33*d38c64d2SGovindraj Raja }; 34*d38c64d2SGovindraj Raja unsigned int midr = (unsigned int)read_midr(); 35*d38c64d2SGovindraj Raja 36*d38c64d2SGovindraj Raja for (unsigned int i = 0U; i < ARRAY_SIZE(midr_no_cpupwrctl); i++) { 37*d38c64d2SGovindraj Raja if (midr_no_cpupwrctl[i] == midr) { 38*d38c64d2SGovindraj Raja return false; 39*d38c64d2SGovindraj Raja } 40*d38c64d2SGovindraj Raja } 41*d38c64d2SGovindraj Raja 42*d38c64d2SGovindraj Raja return true; 43*d38c64d2SGovindraj Raja } 44*d38c64d2SGovindraj Raja 45*d38c64d2SGovindraj Raja #endif /* __arch64__ */ 46