1d38c64d2SGovindraj Raja /* 2d38c64d2SGovindraj Raja * Copyright (c) 2024, ARM Limited and Contributors. All rights reserved. 3d38c64d2SGovindraj Raja * 4d38c64d2SGovindraj Raja * SPDX-License-Identifier: BSD-3-Clause 5d38c64d2SGovindraj Raja */ 6d38c64d2SGovindraj Raja 7d38c64d2SGovindraj Raja #if __aarch64__ 8d38c64d2SGovindraj Raja 9d38c64d2SGovindraj Raja #include <aem_generic.h> 10d38c64d2SGovindraj Raja #include <arch_helpers.h> 11d38c64d2SGovindraj Raja #include <cortex_a35.h> 12d38c64d2SGovindraj Raja #include <cortex_a53.h> 13d38c64d2SGovindraj Raja #include <cortex_a57.h> 14d38c64d2SGovindraj Raja #include <cortex_a72.h> 15d38c64d2SGovindraj Raja #include <cortex_a73.h> 16d38c64d2SGovindraj Raja #include <cortex_a78_ae.h> 17d38c64d2SGovindraj Raja #include <drivers/arm/fvp/fvp_cpu_pwr.h> 18d38c64d2SGovindraj Raja #include <lib/utils_def.h> 19d38c64d2SGovindraj Raja #include <neoverse_e1.h> 20d38c64d2SGovindraj Raja check_cpupwrctrl_el1_is_available(void)21d38c64d2SGovindraj Rajabool check_cpupwrctrl_el1_is_available(void) 22d38c64d2SGovindraj Raja { 23*36ceead8SLinus Nielsen /* Populate list of CPU midr that doesn't support CPUPWRCTL_EL1 */ 24*36ceead8SLinus Nielsen static const unsigned int midr_no_cpupwrctl[] = { 25d38c64d2SGovindraj Raja BASE_AEM_MIDR, 26d38c64d2SGovindraj Raja CORTEX_A35_MIDR, 27d38c64d2SGovindraj Raja CORTEX_A53_MIDR, 28d38c64d2SGovindraj Raja CORTEX_A57_MIDR, 29d38c64d2SGovindraj Raja CORTEX_A72_MIDR, 30d38c64d2SGovindraj Raja CORTEX_A73_MIDR, 31d38c64d2SGovindraj Raja CORTEX_A78_AE_MIDR, 32d38c64d2SGovindraj Raja NEOVERSE_E1_MIDR 33d38c64d2SGovindraj Raja }; 34d38c64d2SGovindraj Raja unsigned int midr = (unsigned int)read_midr(); 35d38c64d2SGovindraj Raja 36d38c64d2SGovindraj Raja for (unsigned int i = 0U; i < ARRAY_SIZE(midr_no_cpupwrctl); i++) { 37d38c64d2SGovindraj Raja if (midr_no_cpupwrctl[i] == midr) { 38d38c64d2SGovindraj Raja return false; 39d38c64d2SGovindraj Raja } 40d38c64d2SGovindraj Raja } 41d38c64d2SGovindraj Raja 42d38c64d2SGovindraj Raja return true; 43d38c64d2SGovindraj Raja } 44d38c64d2SGovindraj Raja 45d38c64d2SGovindraj Raja #endif /* __arch64__ */ 46