xref: /rk3399_ARM-atf/plat/arm/board/fvp/fvp_bl31_setup.c (revision 0c306cc062611d71cd79a2cf2b7aac022c741165)
1 /*
2  * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <arm_config.h>
8 #include <plat_arm.h>
9 #include <smmu_v3.h>
10 #include "fvp_private.h"
11 
12 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
13 		u_register_t arg2, u_register_t arg3)
14 {
15 	arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
16 
17 	/* Initialize the platform config for future decision making */
18 	fvp_config_setup();
19 
20 	/*
21 	 * Initialize the correct interconnect for this cluster during cold
22 	 * boot. No need for locks as no other CPU is active.
23 	 */
24 	fvp_interconnect_init();
25 
26 	/*
27 	 * Enable coherency in interconnect for the primary CPU's cluster.
28 	 * Earlier bootloader stages might already do this (e.g. Trusted
29 	 * Firmware's BL1 does it) but we can't assume so. There is no harm in
30 	 * executing this code twice anyway.
31 	 * FVP PSCI code will enable coherency for other clusters.
32 	 */
33 	fvp_interconnect_enable();
34 
35 	/* On FVP RevC, intialize SMMUv3 */
36 	if (arm_config.flags & ARM_CONFIG_FVP_HAS_SMMUV3)
37 		smmuv3_init(PLAT_FVP_SMMUV3_BASE);
38 }
39