1 /* 2 * Copyright (c) 2022, Xilinx, Inc. All rights reserved. 3 * Copyright (c) 2022-2025, Advanced Micro Devices, Inc. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #include <assert.h> 9 10 #include <common/debug.h> 11 #include <drivers/delay_timer.h> 12 #include <lib/mmio.h> 13 #include <lib/psci/psci.h> 14 #include <plat/arm/common/plat_arm.h> 15 #include <plat/common/platform.h> 16 #include <plat_arm.h> 17 18 #include "def.h" 19 #include <ipi.h> 20 #include <plat_private.h> 21 #include "pm_api_sys.h" 22 #include "pm_client.h" 23 #include <pm_common.h> 24 #include "pm_defs.h" 25 #include "pm_svc_main.h" 26 27 static uintptr_t sec_entry; 28 29 static int32_t versal2_pwr_domain_on(u_register_t mpidr) 30 { 31 int32_t cpu_id = plat_core_pos_by_mpidr(mpidr); 32 int32_t ret = (int32_t) PSCI_E_INTERN_FAIL; 33 enum pm_ret_status pm_ret; 34 const struct pm_proc *proc; 35 36 if (cpu_id != -1) { 37 proc = pm_get_proc((uint32_t)cpu_id); 38 if (proc != NULL) { 39 pm_ret = pm_req_wakeup(proc->node_id, 40 (uint32_t) 41 ((sec_entry & 0xFFFFFFFFU) | 0x1U), 42 sec_entry >> 32, 0, 0); 43 44 if (pm_ret == PM_RET_SUCCESS) { 45 /* Clear power down request */ 46 pm_client_wakeup(proc); 47 ret = (int32_t) PSCI_E_SUCCESS; 48 } 49 } 50 } 51 52 return ret; 53 } 54 55 /** 56 * versal2_pwr_domain_off() - Turn off core. 57 * @target_state: Targeted state. 58 */ 59 static void versal2_pwr_domain_off(const psci_power_state_t *target_state) 60 { 61 const struct pm_proc *proc; 62 uint32_t cpu_id = plat_my_core_pos(); 63 enum pm_ret_status pm_ret; 64 size_t i; 65 66 proc = pm_get_proc(cpu_id); 67 if (proc == NULL) { 68 ERROR("Failed to get proc %d\n", cpu_id); 69 goto err; 70 } 71 72 for (i = 0; i <= PLAT_MAX_PWR_LVL; i++) { 73 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", 74 __func__, i, target_state->pwr_domain_state[i]); 75 } 76 77 plat_gic_cpuif_disable(); 78 /* 79 * Send request to PMC to power down the appropriate APU CPU 80 * core. 81 * According to PSCI specification, CPU_off function does not 82 * have resume address and CPU core can only be woken up 83 * invoking CPU_on function, during which resume address will 84 * be set. 85 */ 86 pm_ret = pm_self_suspend(proc->node_id, MAX_LATENCY, PM_STATE_CPU_IDLE, 0, 87 SECURE_FLAG); 88 89 if (pm_ret != PM_RET_SUCCESS) { 90 ERROR("Failed to power down CPU %d\n", cpu_id); 91 } 92 err: 93 return; 94 } 95 96 /** 97 * versal2_system_reset() - Send the reset request to firmware for the 98 * system to reset. This function does not 99 * return as it resets system. 100 */ 101 static void __dead2 versal2_system_reset(void) 102 { 103 uint32_t timeout = 10000U; 104 enum pm_ret_status pm_ret; 105 int32_t ret; 106 107 request_cpu_pwrdwn(); 108 109 /* 110 * Send the system reset request to the firmware if power down request 111 * is not received from firmware. 112 */ 113 if (pwrdwn_req_received == false) { 114 /* 115 * TODO: shutdown scope for this reset needs be revised once 116 * we have a clearer understanding of the overall reset scoping 117 * including the implementation of SYSTEM_RESET2. 118 */ 119 pm_ret = pm_system_shutdown(XPM_SHUTDOWN_TYPE_RESET, 120 pm_get_shutdown_scope(), SECURE_FLAG); 121 122 if (pm_ret != PM_RET_SUCCESS) { 123 WARN("System shutdown failed\n"); 124 } 125 126 /* 127 * Wait for system shutdown request completed and idle callback 128 * not received. 129 */ 130 do { 131 ret = ipi_mb_enquire_status(primary_proc->ipi->local_ipi_id, 132 primary_proc->ipi->remote_ipi_id); 133 udelay(100); 134 timeout--; 135 } while ((ret != (int32_t)IPI_MB_STATUS_RECV_PENDING) && (timeout > 0U)); 136 } 137 138 (void)psci_cpu_off(); 139 140 while (true) { 141 wfi(); 142 } 143 } 144 145 /** 146 * versal2_pwr_domain_suspend() - Send request to PMC to suspend core. 147 * @target_state: Targeted state. 148 */ 149 static void versal2_pwr_domain_suspend(const psci_power_state_t *target_state) 150 { 151 const struct pm_proc *proc; 152 uint32_t cpu_id = plat_my_core_pos(); 153 uint32_t state; 154 enum pm_ret_status ret; 155 size_t i; 156 157 proc = pm_get_proc(cpu_id); 158 if (proc == NULL) { 159 ERROR("Failed to get proc %d\n", cpu_id); 160 goto err; 161 } 162 163 for (i = 0; i <= PLAT_MAX_PWR_LVL; i++) { 164 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", 165 __func__, i, target_state->pwr_domain_state[i]); 166 } 167 168 plat_gic_cpuif_disable(); 169 170 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { 171 plat_gic_save(); 172 } 173 174 state = (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) ? 175 PM_STATE_SUSPEND_TO_RAM : PM_STATE_CPU_IDLE; 176 177 /* Send request to PMC to suspend this core */ 178 ret = pm_self_suspend(proc->node_id, MAX_LATENCY, state, sec_entry, 179 SECURE_FLAG); 180 181 if (ret != PM_RET_SUCCESS) { 182 ERROR("Failed to power down CPU %d\n", cpu_id); 183 } 184 185 err: 186 return; 187 } 188 189 static void versal2_pwr_domain_on_finish(const psci_power_state_t *target_state) 190 { 191 (void)target_state; 192 193 /* Enable the gic cpu interface */ 194 plat_gic_pcpu_init(); 195 196 /* Program the gic per-cpu distributor or re-distributor interface */ 197 plat_gic_cpuif_enable(); 198 } 199 200 /** 201 * versal2_pwr_domain_suspend_finish() - Performs actions to finish 202 * suspend procedure. 203 * @target_state: Targeted state. 204 */ 205 static void versal2_pwr_domain_suspend_finish(const psci_power_state_t *target_state) 206 { 207 const struct pm_proc *proc; 208 uint32_t cpu_id = plat_my_core_pos(); 209 size_t i; 210 211 proc = pm_get_proc(cpu_id); 212 if (proc == NULL) { 213 ERROR("Failed to get proc %d\n", cpu_id); 214 goto err; 215 } 216 217 for (i = 0; i <= PLAT_MAX_PWR_LVL; i++) { 218 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", 219 __func__, i, target_state->pwr_domain_state[i]); 220 } 221 222 /* Clear the APU power control register for this cpu */ 223 pm_client_wakeup(proc); 224 225 /* APU was turned off, so restore GIC context */ 226 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { 227 plat_gic_resume(); 228 } 229 230 plat_gic_cpuif_enable(); 231 232 err: 233 return; 234 } 235 236 /** 237 * versal2_system_off() - Send the system off request to firmware. 238 * This function does not return as it puts core into WFI 239 */ 240 static void __dead2 versal2_system_off(void) 241 { 242 enum pm_ret_status ret; 243 244 /* Send the power down request to the PMC */ 245 ret = pm_system_shutdown(XPM_SHUTDOWN_TYPE_SHUTDOWN, 246 pm_get_shutdown_scope(), SECURE_FLAG); 247 248 if (ret != PM_RET_SUCCESS) { 249 ERROR("System shutdown failed\n"); 250 } 251 252 while (true) { 253 wfi(); 254 } 255 } 256 257 /** 258 * versal2_validate_power_state() - Ensure that the power state 259 * parameter in request is valid. 260 * @power_state: Power state of core. 261 * @req_state: Requested state. 262 * 263 * Return: Returns status, either PSCI_E_SUCCESS or reason. 264 */ 265 static int32_t versal2_validate_power_state(unsigned int power_state, 266 psci_power_state_t *req_state) 267 { 268 uint32_t pstate = psci_get_pstate_type(power_state); 269 int32_t ret = PSCI_E_SUCCESS; 270 271 VERBOSE("%s: power_state: 0x%x\n", __func__, power_state); 272 273 assert(req_state); 274 275 /* Sanity check the requested state */ 276 if (pstate == PSTATE_TYPE_STANDBY) { 277 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; 278 } else { 279 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; 280 } 281 282 /* The 'state_id' is expected to be zero */ 283 if (psci_get_pstate_id(power_state) != 0U) { 284 ret = PSCI_E_INVALID_PARAMS; 285 } 286 287 return ret; 288 } 289 290 /** 291 * versal2_get_sys_suspend_power_state() - Get power state for system 292 * suspend. 293 * @req_state: Requested state. 294 */ 295 static void versal2_get_sys_suspend_power_state(psci_power_state_t *req_state) 296 { 297 uint64_t i; 298 299 for (i = MPIDR_AFFLVL0; i <= PLAT_MAX_PWR_LVL; i++) { 300 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; 301 } 302 } 303 304 /** 305 * Export the platform specific power ops. 306 */ 307 static const struct plat_psci_ops versal2_nopmc_psci_ops = { 308 .pwr_domain_on = versal2_pwr_domain_on, 309 .pwr_domain_off = versal2_pwr_domain_off, 310 .pwr_domain_on_finish = versal2_pwr_domain_on_finish, 311 .pwr_domain_suspend = versal2_pwr_domain_suspend, 312 .pwr_domain_suspend_finish = versal2_pwr_domain_suspend_finish, 313 .system_off = versal2_system_off, 314 .system_reset = versal2_system_reset, 315 .validate_power_state = versal2_validate_power_state, 316 .get_sys_suspend_power_state = versal2_get_sys_suspend_power_state, 317 }; 318 319 int plat_setup_psci_ops(uintptr_t sec_entrypoint, 320 const struct plat_psci_ops **psci_ops) 321 { 322 sec_entry = sec_entrypoint; 323 324 VERBOSE("Setting up entry point %lx\n", sec_entry); 325 326 *psci_ops = &versal2_nopmc_psci_ops; 327 328 return 0; 329 } 330 331 int32_t sip_svc_setup_init(void) 332 { 333 return pm_setup(); 334 } 335 336 uint64_t smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, uint64_t x4, 337 const void *cookie, void *handle, uint64_t flags) 338 { 339 return pm_smc_handler(smc_fid, x1, x2, x3, x4, cookie, handle, flags); 340 } 341