164b3d9d8SSamuel Holland /* 2ae3fe6e3SSamuel Holland * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. 364b3d9d8SSamuel Holland * 464b3d9d8SSamuel Holland * SPDX-License-Identifier: BSD-3-Clause 564b3d9d8SSamuel Holland */ 664b3d9d8SSamuel Holland 7c3cf06f1SAntonio Nino Diaz #ifndef SUNXI_MMAP_H 8c3cf06f1SAntonio Nino Diaz #define SUNXI_MMAP_H 964b3d9d8SSamuel Holland 1064b3d9d8SSamuel Holland /* Memory regions */ 1164b3d9d8SSamuel Holland #define SUNXI_ROM_BASE 0x00000000 1264b3d9d8SSamuel Holland #define SUNXI_ROM_SIZE 0x00010000 1364b3d9d8SSamuel Holland #define SUNXI_SRAM_BASE 0x00010000 1464b3d9d8SSamuel Holland #define SUNXI_SRAM_SIZE 0x00044000 1564b3d9d8SSamuel Holland #define SUNXI_SRAM_A1_BASE 0x00010000 1664b3d9d8SSamuel Holland #define SUNXI_SRAM_A1_SIZE 0x00008000 17ae3fe6e3SSamuel Holland #define SUNXI_SRAM_A2_BASE 0x00040000 18*f04dfbb2SIcenowy Zheng #define SUNXI_SRAM_A2_BL31_OFFSET 0x00004000 19ae3fe6e3SSamuel Holland #define SUNXI_SRAM_A2_SIZE 0x00014000 2064b3d9d8SSamuel Holland #define SUNXI_SRAM_C_BASE 0x00018000 2164b3d9d8SSamuel Holland #define SUNXI_SRAM_C_SIZE 0x0001c000 2264b3d9d8SSamuel Holland #define SUNXI_DEV_BASE 0x01000000 2364b3d9d8SSamuel Holland #define SUNXI_DEV_SIZE 0x01000000 2464b3d9d8SSamuel Holland #define SUNXI_DRAM_BASE 0x40000000 25c3af6b00SAndre Przywara #define SUNXI_DRAM_VIRT_BASE 0x02000000 2664b3d9d8SSamuel Holland 2764b3d9d8SSamuel Holland /* Memory-mapped devices */ 2864b3d9d8SSamuel Holland #define SUNXI_CPU_MBIST_BASE 0x01502000 2964b3d9d8SSamuel Holland #define SUNXI_CPUCFG_BASE 0x01700000 3064b3d9d8SSamuel Holland #define SUNXI_SYSCON_BASE 0x01c00000 31acb8b3caSAndre Przywara #define SUNXI_DMA_BASE 0x01c02000 3264b3d9d8SSamuel Holland #define SUNXI_KEYMEM_BASE 0x01c0b000 3364b3d9d8SSamuel Holland #define SUNXI_SMHC0_BASE 0x01c0f000 3464b3d9d8SSamuel Holland #define SUNXI_SMHC1_BASE 0x01c10000 3564b3d9d8SSamuel Holland #define SUNXI_SMHC2_BASE 0x01c11000 3664b3d9d8SSamuel Holland #define SUNXI_SID_BASE 0x01c14000 3764b3d9d8SSamuel Holland #define SUNXI_MSGBOX_BASE 0x01c17000 3864b3d9d8SSamuel Holland #define SUNXI_SPINLOCK_BASE 0x01c18000 3964b3d9d8SSamuel Holland #define SUNXI_CCU_BASE 0x01c20000 4064b3d9d8SSamuel Holland #define SUNXI_PIO_BASE 0x01c20800 4164b3d9d8SSamuel Holland #define SUNXI_TIMER_BASE 0x01c20c00 4264b3d9d8SSamuel Holland #define SUNXI_WDOG_BASE 0x01c20ca0 43acb8b3caSAndre Przywara #define SUNXI_SPC_BASE 0x01c23400 4464b3d9d8SSamuel Holland #define SUNXI_THS_BASE 0x01c25000 4564b3d9d8SSamuel Holland #define SUNXI_UART0_BASE 0x01c28000 4664b3d9d8SSamuel Holland #define SUNXI_UART1_BASE 0x01c28400 4764b3d9d8SSamuel Holland #define SUNXI_UART2_BASE 0x01c28800 4864b3d9d8SSamuel Holland #define SUNXI_UART3_BASE 0x01c28c00 4964b3d9d8SSamuel Holland #define SUNXI_I2C0_BASE 0x01c2ac00 5064b3d9d8SSamuel Holland #define SUNXI_I2C1_BASE 0x01c2b000 5164b3d9d8SSamuel Holland #define SUNXI_I2C2_BASE 0x01c2b400 5264b3d9d8SSamuel Holland #define SUNXI_DRAMCOM_BASE 0x01c62000 5364b3d9d8SSamuel Holland #define SUNXI_DRAMCTL_BASE 0x01c63000 5464b3d9d8SSamuel Holland #define SUNXI_DRAMPHY_BASE 0x01c65000 5564b3d9d8SSamuel Holland #define SUNXI_SPI0_BASE 0x01c68000 5664b3d9d8SSamuel Holland #define SUNXI_SPI1_BASE 0x01c69000 5764b3d9d8SSamuel Holland #define SUNXI_SCU_BASE 0x01c80000 5864b3d9d8SSamuel Holland #define SUNXI_GICD_BASE 0x01c81000 5964b3d9d8SSamuel Holland #define SUNXI_GICC_BASE 0x01c82000 6064b3d9d8SSamuel Holland #define SUNXI_RTC_BASE 0x01f00000 6164b3d9d8SSamuel Holland #define SUNXI_R_TIMER_BASE 0x01f00800 6264b3d9d8SSamuel Holland #define SUNXI_R_INTC_BASE 0x01f00c00 6364b3d9d8SSamuel Holland #define SUNXI_R_WDOG_BASE 0x01f01000 6464b3d9d8SSamuel Holland #define SUNXI_R_PRCM_BASE 0x01f01400 6564b3d9d8SSamuel Holland #define SUNXI_R_TWD_BASE 0x01f01800 6664b3d9d8SSamuel Holland #define SUNXI_R_CPUCFG_BASE 0x01f01c00 6764b3d9d8SSamuel Holland #define SUNXI_R_CIR_BASE 0x01f02000 6864b3d9d8SSamuel Holland #define SUNXI_R_I2C_BASE 0x01f02400 6964b3d9d8SSamuel Holland #define SUNXI_R_UART_BASE 0x01f02800 7064b3d9d8SSamuel Holland #define SUNXI_R_PIO_BASE 0x01f02c00 7164b3d9d8SSamuel Holland #define SUNXI_R_RSB_BASE 0x01f03400 7264b3d9d8SSamuel Holland #define SUNXI_R_PWM_BASE 0x01f03800 7364b3d9d8SSamuel Holland 74c3cf06f1SAntonio Nino Diaz #endif /* SUNXI_MMAP_H */ 75