1532ed618SSoby Mathew/* 2cc94e71bSBoyan Karatotev * Copyright (c) 2014-2025, Arm Limited and Contributors. All rights reserved. 3532ed618SSoby Mathew * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 5532ed618SSoby Mathew */ 6532ed618SSoby Mathew 7532ed618SSoby Mathew#include <asm_macros.S> 8532ed618SSoby Mathew#include <assert_macros.S> 9db9ee834SBoyan Karatotev#include <cpu_macros.S> 1009d40e0eSAntonio Nino Diaz#include <lib/psci/psci.h> 11532ed618SSoby Mathew#include <platform_def.h> 12532ed618SSoby Mathew 13532ed618SSoby Mathew .globl psci_do_pwrdown_cache_maintenance 14532ed618SSoby Mathew .globl psci_do_pwrup_cache_maintenance 15532ed618SSoby Mathew 16532ed618SSoby Mathew/* ----------------------------------------------------------------------- 17*aadb4b56SBoyan Karatotev * void psci_do_pwrdown_cache_maintenance(void); 18532ed618SSoby Mathew * 19*aadb4b56SBoyan Karatotev * This function turns off data caches and also ensures that stack memory 20*aadb4b56SBoyan Karatotev * is correctly flushed out to avoid coherency issues due to a change in 21*aadb4b56SBoyan Karatotev * its memory attributes. 22532ed618SSoby Mathew * ----------------------------------------------------------------------- 23532ed618SSoby Mathew */ 24532ed618SSoby Mathewfunc psci_do_pwrdown_cache_maintenance 25532ed618SSoby Mathew stp x29, x30, [sp,#-16]! 26532ed618SSoby Mathew stp x19, x20, [sp,#-16]! 27532ed618SSoby Mathew 28*aadb4b56SBoyan Karatotev /* Disable L1 data cache and unified L2 cache */ 29*aadb4b56SBoyan Karatotev mrs x1, sctlr_el3 30*aadb4b56SBoyan Karatotev bic x1, x1, #SCTLR_C_BIT 31*aadb4b56SBoyan Karatotev msr sctlr_el3, x1 32*aadb4b56SBoyan Karatotev isb 33532ed618SSoby Mathew 34532ed618SSoby Mathew /* --------------------------------------------- 35532ed618SSoby Mathew * Do stack maintenance by flushing the used 36532ed618SSoby Mathew * stack to the main memory and invalidating the 37532ed618SSoby Mathew * remainder. 38532ed618SSoby Mathew * --------------------------------------------- 39532ed618SSoby Mathew */ 40532ed618SSoby Mathew bl plat_get_my_stack 41532ed618SSoby Mathew 42532ed618SSoby Mathew /* --------------------------------------------- 43532ed618SSoby Mathew * Calculate and store the size of the used 44532ed618SSoby Mathew * stack memory in x1. 45532ed618SSoby Mathew * --------------------------------------------- 46532ed618SSoby Mathew */ 47532ed618SSoby Mathew mov x19, x0 48532ed618SSoby Mathew mov x1, sp 49532ed618SSoby Mathew sub x1, x0, x1 50532ed618SSoby Mathew mov x0, sp 51532ed618SSoby Mathew bl flush_dcache_range 52532ed618SSoby Mathew 53532ed618SSoby Mathew /* --------------------------------------------- 54532ed618SSoby Mathew * Calculate and store the size of the unused 55532ed618SSoby Mathew * stack memory in x1. Calculate and store the 56532ed618SSoby Mathew * stack base address in x0. 57532ed618SSoby Mathew * --------------------------------------------- 58532ed618SSoby Mathew */ 59532ed618SSoby Mathew sub x0, x19, #PLATFORM_STACK_SIZE 60532ed618SSoby Mathew sub x1, sp, x0 61532ed618SSoby Mathew bl inv_dcache_range 62532ed618SSoby Mathew 63532ed618SSoby Mathew ldp x19, x20, [sp], #16 64532ed618SSoby Mathew ldp x29, x30, [sp], #16 65532ed618SSoby Mathew ret 66532ed618SSoby Mathewendfunc psci_do_pwrdown_cache_maintenance 67532ed618SSoby Mathew 68532ed618SSoby Mathew 69532ed618SSoby Mathew/* ----------------------------------------------------------------------- 70532ed618SSoby Mathew * void psci_do_pwrup_cache_maintenance(void); 71532ed618SSoby Mathew * 72532ed618SSoby Mathew * This function performs cache maintenance after this cpu is powered up. 73532ed618SSoby Mathew * Currently, this involves managing the used stack memory before turning 74532ed618SSoby Mathew * on the data cache. 75532ed618SSoby Mathew * ----------------------------------------------------------------------- 76532ed618SSoby Mathew */ 77532ed618SSoby Mathewfunc psci_do_pwrup_cache_maintenance 78532ed618SSoby Mathew stp x29, x30, [sp,#-16]! 79532ed618SSoby Mathew 80532ed618SSoby Mathew /* --------------------------------------------- 81532ed618SSoby Mathew * Ensure any inflight stack writes have made it 82532ed618SSoby Mathew * to main memory. 83532ed618SSoby Mathew * --------------------------------------------- 84532ed618SSoby Mathew */ 85532ed618SSoby Mathew dmb st 86532ed618SSoby Mathew 87532ed618SSoby Mathew /* --------------------------------------------- 88532ed618SSoby Mathew * Calculate and store the size of the used 89532ed618SSoby Mathew * stack memory in x1. Calculate and store the 90532ed618SSoby Mathew * stack base address in x0. 91532ed618SSoby Mathew * --------------------------------------------- 92532ed618SSoby Mathew */ 93532ed618SSoby Mathew bl plat_get_my_stack 94532ed618SSoby Mathew mov x1, sp 95532ed618SSoby Mathew sub x1, x0, x1 96532ed618SSoby Mathew mov x0, sp 97532ed618SSoby Mathew bl inv_dcache_range 98532ed618SSoby Mathew 99532ed618SSoby Mathew /* --------------------------------------------- 100532ed618SSoby Mathew * Enable the data cache. 101532ed618SSoby Mathew * --------------------------------------------- 102532ed618SSoby Mathew */ 103532ed618SSoby Mathew mrs x0, sctlr_el3 104532ed618SSoby Mathew orr x0, x0, #SCTLR_C_BIT 105532ed618SSoby Mathew msr sctlr_el3, x0 106532ed618SSoby Mathew isb 107532ed618SSoby Mathew 108532ed618SSoby Mathew ldp x29, x30, [sp], #16 109532ed618SSoby Mathew ret 110532ed618SSoby Mathewendfunc psci_do_pwrup_cache_maintenance 111