xref: /rk3399_ARM-atf/lib/cpus/cpu-ops.mk (revision 0e985d708e8f429c1fa1f557d3eea90e32de5228)
15541bb3fSSoby Mathew#
2da6d75a0SJohn Tsichritzis# Copyright (c) 2014-2019, ARM Limited and Contributors. All rights reserved.
35541bb3fSSoby Mathew#
482cb2c1aSdp-arm# SPDX-License-Identifier: BSD-3-Clause
55541bb3fSSoby Mathew#
65541bb3fSSoby Mathew
75541bb3fSSoby Mathew# Cortex A57 specific optimisation to skip L1 cache flush when
85541bb3fSSoby Mathew# cluster is powered down.
95541bb3fSSoby MathewSKIP_A57_L1_FLUSH_PWR_DWN	?=0
105541bb3fSSoby Mathew
1154035fc4SSandrine Bailleux# Flag to disable the cache non-temporal hint.
1254035fc4SSandrine Bailleux# It is enabled by default.
1354035fc4SSandrine BailleuxA53_DISABLE_NON_TEMPORAL_HINT	?=1
1454035fc4SSandrine Bailleux
1554035fc4SSandrine Bailleux# Flag to disable the cache non-temporal hint.
1654035fc4SSandrine Bailleux# It is enabled by default.
1754035fc4SSandrine BailleuxA57_DISABLE_NON_TEMPORAL_HINT	?=1
1854035fc4SSandrine Bailleux
19f62ad322SDimitris PapastamosWORKAROUND_CVE_2017_5715	?=1
20b8a25bbbSDimitris PapastamosWORKAROUND_CVE_2018_3639	?=1
21fe007b2eSDimitris PapastamosDYNAMIC_WORKAROUND_CVE_2018_3639	?=0
22f62ad322SDimitris Papastamos
235541bb3fSSoby Mathew# Process SKIP_A57_L1_FLUSH_PWR_DWN flag
245541bb3fSSoby Mathew$(eval $(call assert_boolean,SKIP_A57_L1_FLUSH_PWR_DWN))
255541bb3fSSoby Mathew$(eval $(call add_define,SKIP_A57_L1_FLUSH_PWR_DWN))
265541bb3fSSoby Mathew
2754035fc4SSandrine Bailleux# Process A53_DISABLE_NON_TEMPORAL_HINT flag
2854035fc4SSandrine Bailleux$(eval $(call assert_boolean,A53_DISABLE_NON_TEMPORAL_HINT))
2954035fc4SSandrine Bailleux$(eval $(call add_define,A53_DISABLE_NON_TEMPORAL_HINT))
3054035fc4SSandrine Bailleux
3154035fc4SSandrine Bailleux# Process A57_DISABLE_NON_TEMPORAL_HINT flag
3254035fc4SSandrine Bailleux$(eval $(call assert_boolean,A57_DISABLE_NON_TEMPORAL_HINT))
3354035fc4SSandrine Bailleux$(eval $(call add_define,A57_DISABLE_NON_TEMPORAL_HINT))
3454035fc4SSandrine Bailleux
35f62ad322SDimitris Papastamos# Process WORKAROUND_CVE_2017_5715 flag
36f62ad322SDimitris Papastamos$(eval $(call assert_boolean,WORKAROUND_CVE_2017_5715))
37f62ad322SDimitris Papastamos$(eval $(call add_define,WORKAROUND_CVE_2017_5715))
385541bb3fSSoby Mathew
39b8a25bbbSDimitris Papastamos# Process WORKAROUND_CVE_2018_3639 flag
40b8a25bbbSDimitris Papastamos$(eval $(call assert_boolean,WORKAROUND_CVE_2018_3639))
41b8a25bbbSDimitris Papastamos$(eval $(call add_define,WORKAROUND_CVE_2018_3639))
42b8a25bbbSDimitris Papastamos
43fe007b2eSDimitris Papastamos$(eval $(call assert_boolean,DYNAMIC_WORKAROUND_CVE_2018_3639))
44fe007b2eSDimitris Papastamos$(eval $(call add_define,DYNAMIC_WORKAROUND_CVE_2018_3639))
45fe007b2eSDimitris Papastamos
46fe007b2eSDimitris Papastamosifneq (${DYNAMIC_WORKAROUND_CVE_2018_3639},0)
47fe007b2eSDimitris Papastamos    ifeq (${WORKAROUND_CVE_2018_3639},0)
48fe007b2eSDimitris Papastamos        $(error "Error: WORKAROUND_CVE_2018_3639 must be 1 if DYNAMIC_WORKAROUND_CVE_2018_3639 is 1")
49fe007b2eSDimitris Papastamos    endif
50fe007b2eSDimitris Papastamosendif
51fe007b2eSDimitris Papastamos
52097b787aSSandrine Bailleux# CPU Errata Build flags.
53097b787aSSandrine Bailleux# These should be enabled by the platform if the erratum workaround needs to be
54097b787aSSandrine Bailleux# applied.
555541bb3fSSoby Mathew
56dd4cf2c7SJoel Hutton# Flag to apply erratum 794073 workaround when disabling mmu.
57dd4cf2c7SJoel HuttonERRATA_A9_794073	?=0
58dd4cf2c7SJoel Hutton
5975a1ada9SAmbroise Vincent# Flag to apply erratum 816470 workaround during power down. This erratum
6075a1ada9SAmbroise Vincent# applies only to revision >= r3p0 of the Cortex A15 cpu.
6175a1ada9SAmbroise VincentERRATA_A15_816470	?=0
6275a1ada9SAmbroise Vincent
635f2c690dSAmbroise Vincent# Flag to apply erratum 827671 workaround during reset. This erratum applies
645f2c690dSAmbroise Vincent# only to revision >= r3p0 of the Cortex A15 cpu.
655f2c690dSAmbroise VincentERRATA_A15_827671	?=0
665f2c690dSAmbroise Vincent
670b64c194SAmbroise Vincent# Flag to apply erratum 852421 workaround during reset. This erratum applies
680b64c194SAmbroise Vincent# only to revision <= r1p2 of the Cortex A17 cpu.
690b64c194SAmbroise VincentERRATA_A17_852421	?=0
700b64c194SAmbroise Vincent
71be10dcdeSAmbroise Vincent# Flag to apply erratum 852423 workaround during reset. This erratum applies
72be10dcdeSAmbroise Vincent# only to revision <= r1p2 of the Cortex A17 cpu.
73be10dcdeSAmbroise VincentERRATA_A17_852423	?=0
74be10dcdeSAmbroise Vincent
75cba71b70SLouis Mayencourt# Flag to apply erratum 855472 workaround during reset. This erratum applies
76cba71b70SLouis Mayencourt# only to revision r0p0 of the Cortex A35 cpu.
77cba71b70SLouis MayencourtERRATA_A35_855472	?=0
78cba71b70SLouis Mayencourt
79bd393704SAmbroise Vincent# Flag to apply erratum 819472 workaround during reset. This erratum applies
80bd393704SAmbroise Vincent# only to revision <= r0p1 of the Cortex A53 cpu.
81bd393704SAmbroise VincentERRATA_A53_819472	?=0
82bd393704SAmbroise Vincent
83bd393704SAmbroise Vincent# Flag to apply erratum 824069 workaround during reset. This erratum applies
84bd393704SAmbroise Vincent# only to revision <= r0p2 of the Cortex A53 cpu.
85bd393704SAmbroise VincentERRATA_A53_824069	?=0
86bd393704SAmbroise Vincent
87097b787aSSandrine Bailleux# Flag to apply erratum 826319 workaround during reset. This erratum applies
88097b787aSSandrine Bailleux# only to revision <= r0p2 of the Cortex A53 cpu.
896b0d97b2SJimmy HuangERRATA_A53_826319	?=0
906b0d97b2SJimmy Huang
91bd393704SAmbroise Vincent# Flag to apply erratum 827319 workaround during reset. This erratum applies
92bd393704SAmbroise Vincent# only to revision <= r0p2 of the Cortex A53 cpu.
93bd393704SAmbroise VincentERRATA_A53_827319	?=0
94bd393704SAmbroise Vincent
95a94cc374SDouglas Raillard# Flag to apply erratum 835769 workaround at compile and link time.  This
96a94cc374SDouglas Raillard# erratum applies to revision <= r0p4 of the Cortex A53 cpu. Enabling this
97a94cc374SDouglas Raillard# workaround can lead the linker to create "*.stub" sections.
98a94cc374SDouglas RaillardERRATA_A53_835769	?=0
99a94cc374SDouglas Raillard
100097b787aSSandrine Bailleux# Flag to apply erratum 836870 workaround during reset. This erratum applies
101097b787aSSandrine Bailleux# only to revision <= r0p3 of the Cortex A53 cpu. From r0p4 and onwards, this
1023fbe46d7SDouglas Raillard# erratum workaround is enabled by default in hardware.
1036b0d97b2SJimmy HuangERRATA_A53_836870	?=0
1046b0d97b2SJimmy Huang
105a94cc374SDouglas Raillard# Flag to apply erratum 843419 workaround at link time.
106a94cc374SDouglas Raillard# This erratum applies to revision <= r0p4 of the Cortex A53 cpu. Enabling this
107a94cc374SDouglas Raillard# workaround could lead the linker to emit "*.stub" sections which are 4kB
108a94cc374SDouglas Raillard# aligned.
109a94cc374SDouglas RaillardERRATA_A53_843419	?=0
110a94cc374SDouglas Raillard
111b75dc0e4SAndre Przywara# Flag to apply errata 855873 during reset. This errata applies to all
112b75dc0e4SAndre Przywara# revisions of the Cortex A53 CPU, but this firmware workaround only works
113b75dc0e4SAndre Przywara# for revisions r0p3 and higher. Earlier revisions are taken care
114b75dc0e4SAndre Przywara# of by the rich OS.
115b75dc0e4SAndre PrzywaraERRATA_A53_855873	?=0
116b75dc0e4SAndre Przywara
1171afeee92SAmbroise Vincent# Flag to apply erratum 768277 workaround during reset. This erratum applies
1181afeee92SAmbroise Vincent# only to revision r0p0 of the Cortex A55 cpu.
1191afeee92SAmbroise VincentERRATA_A55_768277	?=0
1201afeee92SAmbroise Vincent
121a6cc6610SAmbroise Vincent# Flag to apply erratum 778703 workaround during reset. This erratum applies
122a6cc6610SAmbroise Vincent# only to revision r0p0 of the Cortex A55 cpu.
123a6cc6610SAmbroise VincentERRATA_A55_778703	?=0
124a6cc6610SAmbroise Vincent
1256ab87d29SAmbroise Vincent# Flag to apply erratum 798797 workaround during reset. This erratum applies
1266ab87d29SAmbroise Vincent# only to revision r0p0 of the Cortex A55 cpu.
1276ab87d29SAmbroise VincentERRATA_A55_798797	?=0
1286ab87d29SAmbroise Vincent
1296e78973eSAmbroise Vincent# Flag to apply erratum 846532 workaround during reset. This erratum applies
1306e78973eSAmbroise Vincent# only to revision <= r0p1 of the Cortex A55 cpu.
1316e78973eSAmbroise VincentERRATA_A55_846532	?=0
1326e78973eSAmbroise Vincent
13347949f3fSAmbroise Vincent# Flag to apply erratum 903758 workaround during reset. This erratum applies
13447949f3fSAmbroise Vincent# only to revision <= r0p1 of the Cortex A55 cpu.
13547949f3fSAmbroise VincentERRATA_A55_903758	?=0
13647949f3fSAmbroise Vincent
137097b787aSSandrine Bailleux# Flag to apply erratum 806969 workaround during reset. This erratum applies
138097b787aSSandrine Bailleux# only to revision r0p0 of the Cortex A57 cpu.
1395541bb3fSSoby MathewERRATA_A57_806969	?=0
1405541bb3fSSoby Mathew
141ccbec91cSAntonio Nino Diaz# Flag to apply erratum 813419 workaround during reset. This erratum applies
142ccbec91cSAntonio Nino Diaz# only to revision r0p0 of the Cortex A57 cpu.
143ccbec91cSAntonio Nino DiazERRATA_A57_813419	?=0
144ccbec91cSAntonio Nino Diaz
145097b787aSSandrine Bailleux# Flag to apply erratum 813420  workaround during reset. This erratum applies
146097b787aSSandrine Bailleux# only to revision r0p0 of the Cortex A57 cpu.
1475541bb3fSSoby MathewERRATA_A57_813420	?=0
1485541bb3fSSoby Mathew
1490f6fbbd2SAmbroise Vincent# Flag to apply erratum 814670  workaround during reset. This erratum applies
1500f6fbbd2SAmbroise Vincent# only to revision r0p0 of the Cortex A57 cpu.
1510f6fbbd2SAmbroise VincentERRATA_A57_814670	?=0
1520f6fbbd2SAmbroise Vincent
1535bd2c24fSAmbroise Vincent# Flag to apply erratum 817169 workaround during power down. This erratum
1545bd2c24fSAmbroise Vincent# applies only to revision <= r0p1 of the Cortex A57 cpu.
1555bd2c24fSAmbroise VincentERRATA_A57_817169	?=0
1565bd2c24fSAmbroise Vincent
157df22d602SSandrine Bailleux# Flag to apply erratum 826974 workaround during reset. This erratum applies
158df22d602SSandrine Bailleux# only to revision <= r1p1 of the Cortex A57 cpu.
159df22d602SSandrine BailleuxERRATA_A57_826974	?=0
160df22d602SSandrine Bailleux
16107288865SSandrine Bailleux# Flag to apply erratum 826977 workaround during reset. This erratum applies
16207288865SSandrine Bailleux# only to revision <= r1p1 of the Cortex A57 cpu.
16307288865SSandrine BailleuxERRATA_A57_826977	?=0
16407288865SSandrine Bailleux
165a8b1c769SSandrine Bailleux# Flag to apply erratum 828024 workaround during reset. This erratum applies
166a8b1c769SSandrine Bailleux# only to revision <= r1p1 of the Cortex A57 cpu.
167a8b1c769SSandrine BailleuxERRATA_A57_828024	?=0
168a8b1c769SSandrine Bailleux
1690b77197bSSandrine Bailleux# Flag to apply erratum 829520 workaround during reset. This erratum applies
1700b77197bSSandrine Bailleux# only to revision <= r1p2 of the Cortex A57 cpu.
1710b77197bSSandrine BailleuxERRATA_A57_829520	?=0
1720b77197bSSandrine Bailleux
173adeecf92SSandrine Bailleux# Flag to apply erratum 833471 workaround during reset. This erratum applies
174adeecf92SSandrine Bailleux# only to revision <= r1p2 of the Cortex A57 cpu.
175adeecf92SSandrine BailleuxERRATA_A57_833471	?=0
176adeecf92SSandrine Bailleux
17745b52c20SEleanor Bonnici# Flag to apply erratum 855972 workaround during reset. This erratum applies
17845b52c20SEleanor Bonnici# only to revision <= r1p3 of the Cortex A57 cpu.
17945b52c20SEleanor BonniciERRATA_A57_859972	?=0
18045b52c20SEleanor Bonnici
1816de9b336SEleanor Bonnici# Flag to apply erratum 855971 workaround during reset. This erratum applies
1826de9b336SEleanor Bonnici# only to revision <= r0p3 of the Cortex A72 cpu.
1836de9b336SEleanor BonniciERRATA_A72_859971	?=0
1846de9b336SEleanor Bonnici
18525278eabSLouis Mayencourt# Flag to apply erratum 852427 workaround during reset. This erratum applies
18625278eabSLouis Mayencourt# only to revision r0p0 of the Cortex A73 cpu.
18725278eabSLouis MayencourtERRATA_A73_852427	?=0
18825278eabSLouis Mayencourt
189e6cab15dSLouis Mayencourt# Flag to apply erratum 855423 workaround during reset. This erratum applies
190e6cab15dSLouis Mayencourt# only to revision <= r0p1 of the Cortex A73 cpu.
191e6cab15dSLouis MayencourtERRATA_A73_855423	?=0
192e6cab15dSLouis Mayencourt
1935f5d1ed7SLouis Mayencourt# Flag to apply erratum 764081 workaround during reset. This erratum applies
1945f5d1ed7SLouis Mayencourt# only to revision <= r0p0 of the Cortex A75 cpu.
1955f5d1ed7SLouis MayencourtERRATA_A75_764081	?=0
1965f5d1ed7SLouis Mayencourt
19798551591SLouis Mayencourt# Flag to apply erratum 790748 workaround during reset. This erratum applies
19898551591SLouis Mayencourt# only to revision <= r0p0 of the Cortex A75 cpu.
19998551591SLouis MayencourtERRATA_A75_790748	?=0
20098551591SLouis Mayencourt
2015c6aa01aSLouis Mayencourt# Flag to apply erratum 1073348 workaround during reset. This erratum applies
2025c6aa01aSLouis Mayencourt# only to revision <= r1p0 of the Cortex A76 cpu.
2035c6aa01aSLouis MayencourtERRATA_A76_1073348	?=0
2045c6aa01aSLouis Mayencourt
205508d7110SLouis Mayencourt# Flag to apply erratum 1130799 workaround during reset. This erratum applies
206508d7110SLouis Mayencourt# only to revision <= r2p0 of the Cortex A76 cpu.
207508d7110SLouis MayencourtERRATA_A76_1130799	?=0
208508d7110SLouis Mayencourt
2095cc8c7baSLouis Mayencourt# Flag to apply erratum 1220197 workaround during reset. This erratum applies
2105cc8c7baSLouis Mayencourt# only to revision <= r2p0 of the Cortex A76 cpu.
2115cc8c7baSLouis MayencourtERRATA_A76_1220197	?=0
2125cc8c7baSLouis Mayencourt
213040b546eSDimitris Papastamos# Flag to apply T32 CLREX workaround during reset. This erratum applies
214da6d75a0SJohn Tsichritzis# only to r0p0 and r1p0 of the Neoverse N1 cpu.
215da6d75a0SJohn TsichritzisERRATA_N1_1043202	?=1
216040b546eSDimitris Papastamos
217*0e985d70SLouis Mayencourt# Flag to apply DSU erratum 798953. This erratum applies to DSUs revision r0p0.
218*0e985d70SLouis Mayencourt# Applying the workaround results in higher DSU power consumption on idle.
219*0e985d70SLouis MayencourtERRATA_DSU_798953	?=0
220*0e985d70SLouis Mayencourt
2218a677180SJohn Tsichritzis# Flag to apply DSU erratum 936184. This erratum applies to DSUs containing
2228a677180SJohn Tsichritzis# the ACP interface and revision < r2p0. Applying the workaround results in
2238a677180SJohn Tsichritzis# higher DSU power consumption on idle.
2248a677180SJohn TsichritzisERRATA_DSU_936184	?=0
2258a677180SJohn Tsichritzis
226dd4cf2c7SJoel Hutton# Process ERRATA_A9_794073 flag
227dd4cf2c7SJoel Hutton$(eval $(call assert_boolean,ERRATA_A9_794073))
228dd4cf2c7SJoel Hutton$(eval $(call add_define,ERRATA_A9_794073))
229dd4cf2c7SJoel Hutton
23075a1ada9SAmbroise Vincent# Process ERRATA_A15_816470 flag
23175a1ada9SAmbroise Vincent$(eval $(call assert_boolean,ERRATA_A15_816470))
23275a1ada9SAmbroise Vincent$(eval $(call add_define,ERRATA_A15_816470))
23375a1ada9SAmbroise Vincent
2345f2c690dSAmbroise Vincent# Process ERRATA_A15_827671 flag
2355f2c690dSAmbroise Vincent$(eval $(call assert_boolean,ERRATA_A15_827671))
2365f2c690dSAmbroise Vincent$(eval $(call add_define,ERRATA_A15_827671))
2375f2c690dSAmbroise Vincent
2380b64c194SAmbroise Vincent# Process ERRATA_A17_852421 flag
2390b64c194SAmbroise Vincent$(eval $(call assert_boolean,ERRATA_A17_852421))
2400b64c194SAmbroise Vincent$(eval $(call add_define,ERRATA_A17_852421))
2410b64c194SAmbroise Vincent
242be10dcdeSAmbroise Vincent# Process ERRATA_A17_852423 flag
243be10dcdeSAmbroise Vincent$(eval $(call assert_boolean,ERRATA_A17_852423))
244be10dcdeSAmbroise Vincent$(eval $(call add_define,ERRATA_A17_852423))
245be10dcdeSAmbroise Vincent
246cba71b70SLouis Mayencourt# Process ERRATA_A35_855472 flag
247cba71b70SLouis Mayencourt$(eval $(call assert_boolean,ERRATA_A35_855472))
248cba71b70SLouis Mayencourt$(eval $(call add_define,ERRATA_A35_855472))
249cba71b70SLouis Mayencourt
250bd393704SAmbroise Vincent# Process ERRATA_A53_819472 flag
251bd393704SAmbroise Vincent$(eval $(call assert_boolean,ERRATA_A53_819472))
252bd393704SAmbroise Vincent$(eval $(call add_define,ERRATA_A53_819472))
253bd393704SAmbroise Vincent
254bd393704SAmbroise Vincent# Process ERRATA_A53_824069 flag
255bd393704SAmbroise Vincent$(eval $(call assert_boolean,ERRATA_A53_824069))
256bd393704SAmbroise Vincent$(eval $(call add_define,ERRATA_A53_824069))
257bd393704SAmbroise Vincent
2586b0d97b2SJimmy Huang# Process ERRATA_A53_826319 flag
2596b0d97b2SJimmy Huang$(eval $(call assert_boolean,ERRATA_A53_826319))
2606b0d97b2SJimmy Huang$(eval $(call add_define,ERRATA_A53_826319))
2616b0d97b2SJimmy Huang
262bd393704SAmbroise Vincent# Process ERRATA_A53_827319 flag
263bd393704SAmbroise Vincent$(eval $(call assert_boolean,ERRATA_A53_827319))
264bd393704SAmbroise Vincent$(eval $(call add_define,ERRATA_A53_827319))
265bd393704SAmbroise Vincent
266a94cc374SDouglas Raillard# Process ERRATA_A53_835769 flag
267a94cc374SDouglas Raillard$(eval $(call assert_boolean,ERRATA_A53_835769))
268a94cc374SDouglas Raillard$(eval $(call add_define,ERRATA_A53_835769))
269a94cc374SDouglas Raillard
2706b0d97b2SJimmy Huang# Process ERRATA_A53_836870 flag
2716b0d97b2SJimmy Huang$(eval $(call assert_boolean,ERRATA_A53_836870))
2726b0d97b2SJimmy Huang$(eval $(call add_define,ERRATA_A53_836870))
2736b0d97b2SJimmy Huang
274a94cc374SDouglas Raillard# Process ERRATA_A53_843419 flag
275a94cc374SDouglas Raillard$(eval $(call assert_boolean,ERRATA_A53_843419))
276a94cc374SDouglas Raillard$(eval $(call add_define,ERRATA_A53_843419))
277a94cc374SDouglas Raillard
278b75dc0e4SAndre Przywara# Process ERRATA_A53_855873 flag
279b75dc0e4SAndre Przywara$(eval $(call assert_boolean,ERRATA_A53_855873))
280b75dc0e4SAndre Przywara$(eval $(call add_define,ERRATA_A53_855873))
281b75dc0e4SAndre Przywara
2821afeee92SAmbroise Vincent# Process ERRATA_A55_768277 flag
2831afeee92SAmbroise Vincent$(eval $(call assert_boolean,ERRATA_A55_768277))
2841afeee92SAmbroise Vincent$(eval $(call add_define,ERRATA_A55_768277))
2851afeee92SAmbroise Vincent
286a6cc6610SAmbroise Vincent# Process ERRATA_A55_778703 flag
287a6cc6610SAmbroise Vincent$(eval $(call assert_boolean,ERRATA_A55_778703))
288a6cc6610SAmbroise Vincent$(eval $(call add_define,ERRATA_A55_778703))
289a6cc6610SAmbroise Vincent
2906ab87d29SAmbroise Vincent# Process ERRATA_A55_798797 flag
2916ab87d29SAmbroise Vincent$(eval $(call assert_boolean,ERRATA_A55_798797))
2926ab87d29SAmbroise Vincent$(eval $(call add_define,ERRATA_A55_798797))
2936ab87d29SAmbroise Vincent
2946e78973eSAmbroise Vincent# Process ERRATA_A55_846532 flag
2956e78973eSAmbroise Vincent$(eval $(call assert_boolean,ERRATA_A55_846532))
2966e78973eSAmbroise Vincent$(eval $(call add_define,ERRATA_A55_846532))
2976e78973eSAmbroise Vincent
29847949f3fSAmbroise Vincent# Process ERRATA_A55_903758 flag
29947949f3fSAmbroise Vincent$(eval $(call assert_boolean,ERRATA_A55_903758))
30047949f3fSAmbroise Vincent$(eval $(call add_define,ERRATA_A55_903758))
30147949f3fSAmbroise Vincent
3025541bb3fSSoby Mathew# Process ERRATA_A57_806969 flag
3035541bb3fSSoby Mathew$(eval $(call assert_boolean,ERRATA_A57_806969))
3045541bb3fSSoby Mathew$(eval $(call add_define,ERRATA_A57_806969))
3055541bb3fSSoby Mathew
306ccbec91cSAntonio Nino Diaz# Process ERRATA_A57_813419 flag
307ccbec91cSAntonio Nino Diaz$(eval $(call assert_boolean,ERRATA_A57_813419))
308ccbec91cSAntonio Nino Diaz$(eval $(call add_define,ERRATA_A57_813419))
309ccbec91cSAntonio Nino Diaz
3105541bb3fSSoby Mathew# Process ERRATA_A57_813420 flag
3115541bb3fSSoby Mathew$(eval $(call assert_boolean,ERRATA_A57_813420))
3125541bb3fSSoby Mathew$(eval $(call add_define,ERRATA_A57_813420))
313df22d602SSandrine Bailleux
3140f6fbbd2SAmbroise Vincent# Process ERRATA_A57_814670 flag
3150f6fbbd2SAmbroise Vincent$(eval $(call assert_boolean,ERRATA_A57_814670))
3160f6fbbd2SAmbroise Vincent$(eval $(call add_define,ERRATA_A57_814670))
3170f6fbbd2SAmbroise Vincent
3185bd2c24fSAmbroise Vincent# Process ERRATA_A57_817169 flag
3195bd2c24fSAmbroise Vincent$(eval $(call assert_boolean,ERRATA_A57_817169))
3205bd2c24fSAmbroise Vincent$(eval $(call add_define,ERRATA_A57_817169))
3215bd2c24fSAmbroise Vincent
322df22d602SSandrine Bailleux# Process ERRATA_A57_826974 flag
323df22d602SSandrine Bailleux$(eval $(call assert_boolean,ERRATA_A57_826974))
324df22d602SSandrine Bailleux$(eval $(call add_define,ERRATA_A57_826974))
325a8b1c769SSandrine Bailleux
32607288865SSandrine Bailleux# Process ERRATA_A57_826977 flag
32707288865SSandrine Bailleux$(eval $(call assert_boolean,ERRATA_A57_826977))
32807288865SSandrine Bailleux$(eval $(call add_define,ERRATA_A57_826977))
32907288865SSandrine Bailleux
330a8b1c769SSandrine Bailleux# Process ERRATA_A57_828024 flag
331a8b1c769SSandrine Bailleux$(eval $(call assert_boolean,ERRATA_A57_828024))
332a8b1c769SSandrine Bailleux$(eval $(call add_define,ERRATA_A57_828024))
3330b77197bSSandrine Bailleux
3340b77197bSSandrine Bailleux# Process ERRATA_A57_829520 flag
3350b77197bSSandrine Bailleux$(eval $(call assert_boolean,ERRATA_A57_829520))
3360b77197bSSandrine Bailleux$(eval $(call add_define,ERRATA_A57_829520))
337adeecf92SSandrine Bailleux
338adeecf92SSandrine Bailleux# Process ERRATA_A57_833471 flag
339adeecf92SSandrine Bailleux$(eval $(call assert_boolean,ERRATA_A57_833471))
340adeecf92SSandrine Bailleux$(eval $(call add_define,ERRATA_A57_833471))
341a94cc374SDouglas Raillard
34245b52c20SEleanor Bonnici# Process ERRATA_A57_859972 flag
34345b52c20SEleanor Bonnici$(eval $(call assert_boolean,ERRATA_A57_859972))
34445b52c20SEleanor Bonnici$(eval $(call add_define,ERRATA_A57_859972))
34545b52c20SEleanor Bonnici
3466de9b336SEleanor Bonnici# Process ERRATA_A72_859971 flag
3476de9b336SEleanor Bonnici$(eval $(call assert_boolean,ERRATA_A72_859971))
3486de9b336SEleanor Bonnici$(eval $(call add_define,ERRATA_A72_859971))
3496de9b336SEleanor Bonnici
35025278eabSLouis Mayencourt# Process ERRATA_A73_852427 flag
35125278eabSLouis Mayencourt$(eval $(call assert_boolean,ERRATA_A73_852427))
35225278eabSLouis Mayencourt$(eval $(call add_define,ERRATA_A73_852427))
35325278eabSLouis Mayencourt
354e6cab15dSLouis Mayencourt# Process ERRATA_A73_855423 flag
355e6cab15dSLouis Mayencourt$(eval $(call assert_boolean,ERRATA_A73_855423))
356e6cab15dSLouis Mayencourt$(eval $(call add_define,ERRATA_A73_855423))
357e6cab15dSLouis Mayencourt
3585f5d1ed7SLouis Mayencourt# Process ERRATA_A75_764081 flag
3595f5d1ed7SLouis Mayencourt$(eval $(call assert_boolean,ERRATA_A75_764081))
3605f5d1ed7SLouis Mayencourt$(eval $(call add_define,ERRATA_A75_764081))
3615f5d1ed7SLouis Mayencourt
36298551591SLouis Mayencourt# Process ERRATA_A75_790748 flag
36398551591SLouis Mayencourt$(eval $(call assert_boolean,ERRATA_A75_790748))
36498551591SLouis Mayencourt$(eval $(call add_define,ERRATA_A75_790748))
36598551591SLouis Mayencourt
3665c6aa01aSLouis Mayencourt# Process ERRATA_A76_1073348 flag
3675c6aa01aSLouis Mayencourt$(eval $(call assert_boolean,ERRATA_A76_1073348))
3685c6aa01aSLouis Mayencourt$(eval $(call add_define,ERRATA_A76_1073348))
3695c6aa01aSLouis Mayencourt
370508d7110SLouis Mayencourt# Process ERRATA_A76_1130799 flag
371508d7110SLouis Mayencourt$(eval $(call assert_boolean,ERRATA_A76_1130799))
372508d7110SLouis Mayencourt$(eval $(call add_define,ERRATA_A76_1130799))
373508d7110SLouis Mayencourt
3745cc8c7baSLouis Mayencourt# Process ERRATA_A76_1220197 flag
3755cc8c7baSLouis Mayencourt$(eval $(call assert_boolean,ERRATA_A76_1220197))
3765cc8c7baSLouis Mayencourt$(eval $(call add_define,ERRATA_A76_1220197))
3775cc8c7baSLouis Mayencourt
378da6d75a0SJohn Tsichritzis# Process ERRATA_N1_1043202 flag
379da6d75a0SJohn Tsichritzis$(eval $(call assert_boolean,ERRATA_N1_1043202))
380da6d75a0SJohn Tsichritzis$(eval $(call add_define,ERRATA_N1_1043202))
381040b546eSDimitris Papastamos
382*0e985d70SLouis Mayencourt# Process ERRATA_DSU_798953 flag
383*0e985d70SLouis Mayencourt$(eval $(call assert_boolean,ERRATA_DSU_798953))
384*0e985d70SLouis Mayencourt$(eval $(call add_define,ERRATA_DSU_798953))
385*0e985d70SLouis Mayencourt
3868a677180SJohn Tsichritzis# Process ERRATA_DSU_936184 flag
3878a677180SJohn Tsichritzis$(eval $(call assert_boolean,ERRATA_DSU_936184))
3888a677180SJohn Tsichritzis$(eval $(call add_define,ERRATA_DSU_936184))
3898a677180SJohn Tsichritzis
390a94cc374SDouglas Raillard# Errata build flags
391a94cc374SDouglas Raillardifneq (${ERRATA_A53_843419},0)
392c2b8806fSDouglas RaillardTF_LDFLAGS_aarch64	+= --fix-cortex-a53-843419
393a94cc374SDouglas Raillardendif
394a94cc374SDouglas Raillard
395a94cc374SDouglas Raillardifneq (${ERRATA_A53_835769},0)
396a94cc374SDouglas RaillardTF_CFLAGS_aarch64	+= -mfix-cortex-a53-835769
397c2b8806fSDouglas RaillardTF_LDFLAGS_aarch64	+= --fix-cortex-a53-835769
398a94cc374SDouglas Raillardendif
399