xref: /rk3399_ARM-atf/include/plat/common/common_def.h (revision 870ce3ddd3b33c59418a7dba703e8a66ec75f98f)
1 /*
2  * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 #ifndef __COMMON_DEF_H__
7 #define __COMMON_DEF_H__
8 
9 #include <bl_common.h>
10 #include <platform_def.h>
11 #include <xlat_tables_defs.h>
12 
13 /******************************************************************************
14  * Required platform porting definitions that are expected to be common to
15  * all platforms
16  *****************************************************************************/
17 
18 /*
19  * Platform binary types for linking
20  */
21 #ifdef AARCH32
22 #define PLATFORM_LINKER_FORMAT          "elf32-littlearm"
23 #define PLATFORM_LINKER_ARCH            arm
24 #else
25 #define PLATFORM_LINKER_FORMAT          "elf64-littleaarch64"
26 #define PLATFORM_LINKER_ARCH            aarch64
27 #endif /* AARCH32 */
28 
29 /*
30  * Generic platform constants
31  */
32 #define FIRMWARE_WELCOME_STR		"Booting Trusted Firmware\n"
33 
34 #if LOAD_IMAGE_V2
35 #define BL2_IMAGE_DESC {				\
36 	.image_id = BL2_IMAGE_ID,			\
37 	SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,	\
38 		VERSION_2, image_info_t, 0),		\
39 	.image_info.image_base = BL2_BASE,		\
40 	.image_info.image_max_size = BL2_LIMIT - BL2_BASE,\
41 	SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,	\
42 		VERSION_2, entry_point_info_t, SECURE | EXECUTABLE),\
43 	.ep_info.pc = BL2_BASE,				\
44 }
45 #else /* LOAD_IMAGE_V2 */
46 #define BL2_IMAGE_DESC {				\
47 	.image_id = BL2_IMAGE_ID,			\
48 	SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,	\
49 		VERSION_1, image_info_t, 0),		\
50 	.image_info.image_base = BL2_BASE,		\
51 	SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,	\
52 		VERSION_1, entry_point_info_t, SECURE | EXECUTABLE),\
53 	.ep_info.pc = BL2_BASE,				\
54 }
55 #endif /* LOAD_IMAGE_V2 */
56 
57 /*
58  * The following constants identify the extents of the code & read-only data
59  * regions. These addresses are used by the MMU setup code and therefore they
60  * must be page-aligned.
61  *
62  * When the code and read-only data are mapped as a single atomic section
63  * (i.e. when SEPARATE_CODE_AND_RODATA=0) then we treat the whole section as
64  * code by specifying the read-only data section as empty.
65  *
66  * BL1 is different than the other images in the sense that its read-write data
67  * originally lives in Trusted ROM and needs to be relocated in Trusted SRAM at
68  * run-time. Therefore, the read-write data in ROM can be mapped with the same
69  * memory attributes as the read-only data region. For this reason, BL1 uses
70  * different macros.
71  *
72  * Note that BL1_ROM_END is not necessarily aligned on a page boundary as it
73  * just points to the end of BL1's actual content in Trusted ROM. Therefore it
74  * needs to be rounded up to the next page size in order to map the whole last
75  * page of it with the right memory attributes.
76  */
77 #if SEPARATE_CODE_AND_RODATA
78 
79 #define BL1_CODE_END		BL_CODE_END
80 #define BL1_RO_DATA_BASE	BL_RO_DATA_BASE
81 #define BL1_RO_DATA_END		round_up(BL1_ROM_END, PAGE_SIZE)
82 #if BL2_IN_XIP_MEM
83 #define BL2_CODE_END		BL_CODE_END
84 #define BL2_RO_DATA_BASE	BL_RO_DATA_BASE
85 #define BL2_RO_DATA_END		round_up(BL2_ROM_END, PAGE_SIZE)
86 #endif /* BL2_IN_XIP_MEM */
87 #else
88 #define BL_RO_DATA_BASE		0
89 #define BL_RO_DATA_END		0
90 #define BL1_CODE_END		round_up(BL1_ROM_END, PAGE_SIZE)
91 #if BL2_IN_XIP_MEM
92 #define BL2_RO_DATA_BASE	0
93 #define BL2_RO_DATA_END		0
94 #define BL2_CODE_END		round_up(BL2_ROM_END, PAGE_SIZE)
95 #endif /* BL2_IN_XIP_MEM */
96 #endif /* SEPARATE_CODE_AND_RODATA */
97 #endif /* __COMMON_DEF_H__ */
98