xref: /rk3399_ARM-atf/include/plat/common/common_def.h (revision 1dcc28cfbac5dae3992ad9581f9ea68f6cb339c1)
1 /*
2  * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 #ifndef __COMMON_DEF_H__
7 #define __COMMON_DEF_H__
8 
9 #include <bl_common.h>
10 #include <platform_def.h>
11 #include <xlat_tables_defs.h>
12 
13 /******************************************************************************
14  * Required platform porting definitions that are expected to be common to
15  * all platforms
16  *****************************************************************************/
17 
18 /*
19  * Platform binary types for linking
20  */
21 #ifdef AARCH32
22 #define PLATFORM_LINKER_FORMAT          "elf32-littlearm"
23 #define PLATFORM_LINKER_ARCH            arm
24 #else
25 #define PLATFORM_LINKER_FORMAT          "elf64-littleaarch64"
26 #define PLATFORM_LINKER_ARCH            aarch64
27 #endif /* AARCH32 */
28 
29 /*
30  * Generic platform constants
31  */
32 #define FIRMWARE_WELCOME_STR		"Booting Trusted Firmware\n"
33 
34 #define BL2_IMAGE_DESC {				\
35 	.image_id = BL2_IMAGE_ID,			\
36 	SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,	\
37 		VERSION_2, image_info_t, 0),		\
38 	.image_info.image_base = BL2_BASE,		\
39 	.image_info.image_max_size = BL2_LIMIT - BL2_BASE,\
40 	SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,	\
41 		VERSION_2, entry_point_info_t, SECURE | EXECUTABLE),\
42 	.ep_info.pc = BL2_BASE,				\
43 }
44 
45 /*
46  * The following constants identify the extents of the code & read-only data
47  * regions. These addresses are used by the MMU setup code and therefore they
48  * must be page-aligned.
49  *
50  * When the code and read-only data are mapped as a single atomic section
51  * (i.e. when SEPARATE_CODE_AND_RODATA=0) then we treat the whole section as
52  * code by specifying the read-only data section as empty.
53  *
54  * BL1 is different than the other images in the sense that its read-write data
55  * originally lives in Trusted ROM and needs to be relocated in Trusted SRAM at
56  * run-time. Therefore, the read-write data in ROM can be mapped with the same
57  * memory attributes as the read-only data region. For this reason, BL1 uses
58  * different macros.
59  *
60  * Note that BL1_ROM_END is not necessarily aligned on a page boundary as it
61  * just points to the end of BL1's actual content in Trusted ROM. Therefore it
62  * needs to be rounded up to the next page size in order to map the whole last
63  * page of it with the right memory attributes.
64  */
65 #if SEPARATE_CODE_AND_RODATA
66 
67 #define BL1_CODE_END		BL_CODE_END
68 #define BL1_RO_DATA_BASE	BL_RO_DATA_BASE
69 #define BL1_RO_DATA_END		round_up(BL1_ROM_END, PAGE_SIZE)
70 #if BL2_IN_XIP_MEM
71 #define BL2_CODE_END		BL_CODE_END
72 #define BL2_RO_DATA_BASE	BL_RO_DATA_BASE
73 #define BL2_RO_DATA_END		round_up(BL2_ROM_END, PAGE_SIZE)
74 #endif /* BL2_IN_XIP_MEM */
75 #else
76 #define BL_RO_DATA_BASE		0
77 #define BL_RO_DATA_END		0
78 #define BL1_CODE_END		round_up(BL1_ROM_END, PAGE_SIZE)
79 #if BL2_IN_XIP_MEM
80 #define BL2_RO_DATA_BASE	0
81 #define BL2_RO_DATA_END		0
82 #define BL2_CODE_END		round_up(BL2_ROM_END, PAGE_SIZE)
83 #endif /* BL2_IN_XIP_MEM */
84 #endif /* SEPARATE_CODE_AND_RODATA */
85 #endif /* __COMMON_DEF_H__ */
86