1 /* 2 * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 #ifndef __V2M_DEF_H__ 31 #define __V2M_DEF_H__ 32 33 #include <xlat_tables.h> 34 35 36 /* V2M motherboard system registers & offsets */ 37 #define V2M_SYSREGS_BASE 0x1c010000 38 #define V2M_SYS_ID 0x0 39 #define V2M_SYS_SWITCH 0x4 40 #define V2M_SYS_LED 0x8 41 #define V2M_SYS_CFGDATA 0xa0 42 #define V2M_SYS_CFGCTRL 0xa4 43 #define V2M_SYS_CFGSTATUS 0xa8 44 45 #define V2M_CFGCTRL_START (1 << 31) 46 #define V2M_CFGCTRL_RW (1 << 30) 47 #define V2M_CFGCTRL_FUNC_SHIFT 20 48 #define V2M_CFGCTRL_FUNC(fn) (fn << V2M_CFGCTRL_FUNC_SHIFT) 49 #define V2M_FUNC_CLK_GEN 0x01 50 #define V2M_FUNC_TEMP 0x04 51 #define V2M_FUNC_DB_RESET 0x05 52 #define V2M_FUNC_SCC_CFG 0x06 53 #define V2M_FUNC_SHUTDOWN 0x08 54 #define V2M_FUNC_REBOOT 0x09 55 56 /* 57 * V2M sysled bit definitions. The values written to this 58 * register are defined in arch.h & runtime_svc.h. Only 59 * used by the primary cpu to diagnose any cold boot issues. 60 * 61 * SYS_LED[0] - Security state (S=0/NS=1) 62 * SYS_LED[2:1] - Exception Level (EL3-EL0) 63 * SYS_LED[7:3] - Exception Class (Sync/Async & origin) 64 * 65 */ 66 #define V2M_SYS_LED_SS_SHIFT 0x0 67 #define V2M_SYS_LED_EL_SHIFT 0x1 68 #define V2M_SYS_LED_EC_SHIFT 0x3 69 70 #define V2M_SYS_LED_SS_MASK 0x1 71 #define V2M_SYS_LED_EL_MASK 0x3 72 #define V2M_SYS_LED_EC_MASK 0x1f 73 74 /* V2M sysid register bits */ 75 #define V2M_SYS_ID_REV_SHIFT 28 76 #define V2M_SYS_ID_HBI_SHIFT 16 77 #define V2M_SYS_ID_BLD_SHIFT 12 78 #define V2M_SYS_ID_ARCH_SHIFT 8 79 #define V2M_SYS_ID_FPGA_SHIFT 0 80 81 #define V2M_SYS_ID_REV_MASK 0xf 82 #define V2M_SYS_ID_HBI_MASK 0xfff 83 #define V2M_SYS_ID_BLD_MASK 0xf 84 #define V2M_SYS_ID_ARCH_MASK 0xf 85 #define V2M_SYS_ID_FPGA_MASK 0xff 86 87 #define V2M_SYS_ID_BLD_LENGTH 4 88 89 90 /* NOR Flash */ 91 #define V2M_FLASH0_BASE 0x08000000 92 #define V2M_FLASH0_SIZE 0x04000000 93 94 #define V2M_IOFPGA_BASE 0x1c000000 95 #define V2M_IOFPGA_SIZE 0x03000000 96 97 /* PL011 UART related constants */ 98 #define V2M_IOFPGA_UART0_BASE 0x1c090000 99 #define V2M_IOFPGA_UART1_BASE 0x1c0a0000 100 #define V2M_IOFPGA_UART2_BASE 0x1c0b0000 101 #define V2M_IOFPGA_UART3_BASE 0x1c0c0000 102 103 #define V2M_IOFPGA_UART0_CLK_IN_HZ 24000000 104 #define V2M_IOFPGA_UART1_CLK_IN_HZ 24000000 105 #define V2M_IOFPGA_UART2_CLK_IN_HZ 24000000 106 #define V2M_IOFPGA_UART3_CLK_IN_HZ 24000000 107 108 /* SP804 timer related constants */ 109 #define V2M_SP804_TIMER0_BASE 0x1C110000 110 #define V2M_SP804_TIMER1_BASE 0x1C120000 111 112 #define V2M_MAP_FLASH0 MAP_REGION_FLAT(V2M_FLASH0_BASE,\ 113 V2M_FLASH0_SIZE, \ 114 MT_MEMORY | MT_RO | MT_SECURE) 115 116 #define V2M_MAP_IOFPGA MAP_REGION_FLAT(V2M_IOFPGA_BASE,\ 117 V2M_IOFPGA_SIZE, \ 118 MT_DEVICE | MT_RW | MT_SECURE) 119 120 121 122 #endif /* __V2M_DEF_H__ */ 123