1 /* 2 * Copyright (c) 2017-2025, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef AMU_H 8 #define AMU_H 9 10 #include <stdbool.h> 11 #include <stdint.h> 12 13 #include <context.h> 14 15 #include <platform_def.h> 16 17 #if ENABLE_FEAT_AMU 18 #if __aarch64__ 19 void amu_enable(cpu_context_t *ctx); 20 void amu_init_el3(unsigned int core_pos); 21 void amu_init_el2_unused(void); 22 void amu_enable_per_world(per_world_context_t *per_world_ctx); 23 #else 24 void amu_enable(bool el2_unused); 25 #endif /* __aarch64__ */ 26 27 #else 28 #if __aarch64__ 29 void amu_enable(cpu_context_t *ctx) 30 { 31 } 32 void amu_init_el3(unsigned int core_pos) 33 { 34 } 35 void amu_init_el2_unused(void) 36 { 37 } 38 void amu_enable_per_world(per_world_context_t *per_world_ctx) 39 { 40 } 41 #else 42 static inline void amu_enable(bool el2_unused) 43 { 44 } 45 #endif /*__aarch64__ */ 46 #endif /* ENABLE_FEAT_AMU */ 47 48 /* 49 * Per-core list of the counters to be enabled. Value will be written into 50 * AMCNTENSET1_EL0 verbatim. 51 */ 52 #if ENABLE_AMU_AUXILIARY_COUNTERS 53 extern uint16_t plat_amu_aux_enables[PLATFORM_CORE_COUNT]; 54 #endif 55 56 #if __aarch64__ 57 /* lower 2 handled by context management */ 58 #define CTX_AMU_GRP0_ALL U(2) 59 #else 60 #define CTX_AMU_GRP0_ALL U(4) 61 #endif 62 #define CTX_AMU_GRP1_ALL U(16) 63 64 typedef struct amu_regs { 65 u_register_t grp0[CTX_AMU_GRP0_ALL]; 66 #if ENABLE_AMU_AUXILIARY_COUNTERS 67 u_register_t grp1[CTX_AMU_GRP1_ALL]; 68 #endif 69 } amu_regs_t; 70 71 static inline u_register_t read_amu_grp0_ctx_reg(amu_regs_t *ctx, size_t index) 72 { 73 return ctx->grp0[index]; 74 } 75 76 static inline void write_amu_grp0_ctx_reg(amu_regs_t *ctx, size_t index, u_register_t val) 77 { 78 ctx->grp0[index] = val; 79 } 80 81 static inline uint16_t get_amu_aux_enables(size_t index) 82 { 83 #if ENABLE_AMU_AUXILIARY_COUNTERS 84 return plat_amu_aux_enables[index]; 85 #else 86 return 0; 87 #endif 88 } 89 90 static inline u_register_t read_amu_grp1_ctx_reg(amu_regs_t *ctx, size_t index) 91 { 92 #if ENABLE_AMU_AUXILIARY_COUNTERS 93 return ctx->grp1[index]; 94 #else 95 return 0; 96 #endif 97 } 98 99 static inline void write_amu_grp1_ctx_reg(amu_regs_t *ctx, size_t index, u_register_t val) 100 { 101 #if ENABLE_AMU_AUXILIARY_COUNTERS 102 ctx->grp1[index] = val; 103 #endif 104 } 105 106 #endif /* AMU_H */ 107