1/* 2 * Copyright (c) 2020-2024, Arm Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/interrupt-controller/irq.h> 11#include <platform_def.h> 12 13#define MHU_TX_ADDR 46240000 /* hex */ 14#define MHU_RX_ADDR 46250000 /* hex */ 15 16#define LIT_CPU_PMU_COMPATIBLE "arm,armv8-pmuv3" 17#define MID_CPU_PMU_COMPATIBLE "arm,armv8-pmuv3" 18#define BIG_CPU_PMU_COMPATIBLE "arm,armv8-pmuv3" 19 20#define ETHERNET_ADDR 64000000 21#define ETHERNET_INT 799 22 23#define SYS_REGS_ADDR 60080000 24 25#define MMC_ADDR 600b0000 26#define MMC_INT_0 778 27#define MMC_INT_1 779 28 29#define RTC_ADDR 600a0000 30#define RTC_INT 777 31 32#define KMI_0_ADDR 60100000 33#define KMI_0_INT 784 34#define KMI_1_ADDR 60110000 35#define KMI_1_INT 785 36 37#define VIRTIO_BLOCK_ADDR 60020000 38#define VIRTIO_BLOCK_INT 769 39 40#include "tc-common.dtsi" 41#if TARGET_FLAVOUR_FVP 42#include "tc-fvp.dtsi" 43#else 44#include "tc-fpga.dtsi" 45#endif /* TARGET_FLAVOUR_FVP */ 46#include "tc3-4-base.dtsi" 47