xref: /rk3399_ARM-atf/fdts/tc4.dts (revision 3cedc47b1d4cf46622b4b5413fab01d3224dc872)
1*3cedc47bSLeo Yan/*
2*3cedc47bSLeo Yan * Copyright (c) 2020-2024, Arm Limited. All rights reserved.
3*3cedc47bSLeo Yan *
4*3cedc47bSLeo Yan * SPDX-License-Identifier: BSD-3-Clause
5*3cedc47bSLeo Yan */
6*3cedc47bSLeo Yan
7*3cedc47bSLeo Yan/dts-v1/;
8*3cedc47bSLeo Yan
9*3cedc47bSLeo Yan#include <dt-bindings/interrupt-controller/arm-gic.h>
10*3cedc47bSLeo Yan#include <dt-bindings/interrupt-controller/irq.h>
11*3cedc47bSLeo Yan#include <platform_def.h>
12*3cedc47bSLeo Yan
13*3cedc47bSLeo Yan#define MHU_TX_ADDR			46240000 /* hex */
14*3cedc47bSLeo Yan#define MHU_RX_ADDR			46250000 /* hex */
15*3cedc47bSLeo Yan
16*3cedc47bSLeo Yan#define LIT_CPU_PMU_COMPATIBLE		"arm,armv8-pmuv3"
17*3cedc47bSLeo Yan#define MID_CPU_PMU_COMPATIBLE		"arm,armv8-pmuv3"
18*3cedc47bSLeo Yan#define BIG_CPU_PMU_COMPATIBLE		"arm,armv8-pmuv3"
19*3cedc47bSLeo Yan
20*3cedc47bSLeo Yan#include "tc-common.dtsi"
21*3cedc47bSLeo Yan#if TARGET_FLAVOUR_FVP
22*3cedc47bSLeo Yan#include "tc-fvp.dtsi"
23*3cedc47bSLeo Yan#else
24*3cedc47bSLeo Yan#include "tc-fpga.dtsi"
25*3cedc47bSLeo Yan#endif /* TARGET_FLAVOUR_FVP */
26*3cedc47bSLeo Yan#include "tc3-4-base.dtsi"
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