1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2/* 3 * Copyright (C) Arrow Electronics 2019 - All Rights Reserved 4 * Author: Botond Kardos <botond.kardos@arroweurope.com> 5 * 6 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved 7 * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 8 */ 9 10/dts-v1/; 11 12#include "stm32mp157c.dtsi" 13#include "stm32mp157cac-pinctrl.dtsi" 14 15/ { 16 model = "Arrow Electronics STM32MP157A Avenger96 board"; 17 compatible = "st,stm32mp157a-avenger96", "st,stm32mp157"; 18 19 aliases { 20 serial0 = &uart4; 21 }; 22 23 chosen { 24 stdout-path = "serial0:115200n8"; 25 }; 26 27}; 28 29&i2c4 { 30 pinctrl-names = "default"; 31 pinctrl-0 = <&i2c4_pins_a>; 32 i2c-scl-rising-time-ns = <185>; 33 i2c-scl-falling-time-ns = <20>; 34 status = "okay"; 35 36 pmic: stpmic@33 { 37 compatible = "st,stpmic1"; 38 reg = <0x33>; 39 interrupts-extended = <&exti_pwr 55 IRQ_TYPE_EDGE_FALLING>; 40 interrupt-controller; 41 #interrupt-cells = <2>; 42 status = "okay"; 43 44 st,main-control-register = <0x04>; 45 st,vin-control-register = <0xc0>; 46 st,usb-control-register = <0x20>; 47 48 regulators { 49 compatible = "st,stpmic1-regulators"; 50 51 ldo1-supply = <&v3v3>; 52 ldo2-supply = <&v3v3>; 53 ldo3-supply = <&vdd_ddr>; 54 ldo5-supply = <&v3v3>; 55 ldo6-supply = <&v3v3>; 56 57 vddcore: buck1 { 58 regulator-name = "vddcore"; 59 regulator-min-microvolt = <1200000>; 60 regulator-max-microvolt = <1350000>; 61 regulator-always-on; 62 regulator-initial-mode = <0>; 63 regulator-over-current-protection; 64 }; 65 66 vdd_ddr: buck2 { 67 regulator-name = "vdd_ddr"; 68 regulator-min-microvolt = <1350000>; 69 regulator-max-microvolt = <1350000>; 70 regulator-always-on; 71 regulator-initial-mode = <0>; 72 regulator-over-current-protection; 73 }; 74 75 vdd: buck3 { 76 regulator-name = "vdd"; 77 regulator-min-microvolt = <3300000>; 78 regulator-max-microvolt = <3300000>; 79 regulator-always-on; 80 st,mask-reset; 81 regulator-initial-mode = <0>; 82 regulator-over-current-protection; 83 }; 84 85 v3v3: buck4 { 86 regulator-name = "v3v3"; 87 regulator-min-microvolt = <3300000>; 88 regulator-max-microvolt = <3300000>; 89 regulator-always-on; 90 regulator-over-current-protection; 91 regulator-initial-mode = <0>; 92 }; 93 94 vdda: ldo1 { 95 regulator-name = "vdda"; 96 regulator-min-microvolt = <2900000>; 97 regulator-max-microvolt = <2900000>; 98 }; 99 100 v2v8: ldo2 { 101 regulator-name = "v2v8"; 102 regulator-min-microvolt = <2800000>; 103 regulator-max-microvolt = <2800000>; 104 }; 105 106 vtt_ddr: ldo3 { 107 regulator-name = "vtt_ddr"; 108 regulator-min-microvolt = <500000>; 109 regulator-max-microvolt = <750000>; 110 regulator-always-on; 111 regulator-over-current-protection; 112 }; 113 114 vdd_usb: ldo4 { 115 regulator-name = "vdd_usb"; 116 regulator-min-microvolt = <3300000>; 117 regulator-max-microvolt = <3300000>; 118 }; 119 120 vdd_sd: ldo5 { 121 regulator-name = "vdd_sd"; 122 regulator-min-microvolt = <2900000>; 123 regulator-max-microvolt = <2900000>; 124 regulator-boot-on; 125 }; 126 127 v1v8: ldo6 { 128 regulator-name = "v1v8"; 129 regulator-min-microvolt = <1800000>; 130 regulator-max-microvolt = <1800000>; 131 }; 132 133 vref_ddr: vref_ddr { 134 regulator-name = "vref_ddr"; 135 regulator-always-on; 136 regulator-over-current-protection; 137 }; 138 }; 139 }; 140}; 141 142&iwdg2 { 143 timeout-sec = <32>; 144 status = "okay"; 145}; 146 147&rng1 { 148 status = "okay"; 149}; 150 151&rtc { 152 status = "okay"; 153}; 154 155&sdmmc1 { 156 pinctrl-names = "default"; 157 pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>; 158 broken-cd; 159 st,sig-dir; 160 st,neg-edge; 161 st,use-ckin; 162 bus-width = <4>; 163 vmmc-supply = <&vdda>; 164 status = "okay"; 165}; 166 167&uart4 { 168 pinctrl-names = "default"; 169 pinctrl-0 = <&uart4_pins_b>; 170 status = "okay"; 171}; 172 173/* ATF Specific */ 174#include <dt-bindings/clock/stm32mp1-clksrc.h> 175#include "stm32mp15-ddr3-2x4Gb-1066-binG.dtsi" 176#include "stm32mp157c-security.dtsi" 177 178/ { 179 aliases { 180 gpio0 = &gpioa; 181 gpio1 = &gpiob; 182 gpio2 = &gpioc; 183 gpio3 = &gpiod; 184 gpio4 = &gpioe; 185 gpio5 = &gpiof; 186 gpio6 = &gpiog; 187 gpio7 = &gpioh; 188 gpio8 = &gpioi; 189 gpio25 = &gpioz; 190 i2c3 = &i2c4; 191 }; 192}; 193 194/* CLOCK init */ 195&rcc { 196 secure-status = "disabled"; 197 st,clksrc = < 198 CLK_MPU_PLL1P 199 CLK_AXI_PLL2P 200 CLK_MCU_PLL3P 201 CLK_PLL12_HSE 202 CLK_PLL3_HSE 203 CLK_PLL4_HSE 204 CLK_RTC_LSE 205 CLK_MCO1_DISABLED 206 CLK_MCO2_DISABLED 207 >; 208 209 st,clkdiv = < 210 1 /*MPU*/ 211 0 /*AXI*/ 212 0 /*MCU*/ 213 1 /*APB1*/ 214 1 /*APB2*/ 215 1 /*APB3*/ 216 1 /*APB4*/ 217 2 /*APB5*/ 218 23 /*RTC*/ 219 0 /*MCO1*/ 220 0 /*MCO2*/ 221 >; 222 223 st,pkcs = < 224 CLK_CKPER_HSE 225 CLK_FMC_ACLK 226 CLK_QSPI_ACLK 227 CLK_ETH_DISABLED 228 CLK_SDMMC12_PLL4P 229 CLK_DSI_DSIPLL 230 CLK_STGEN_HSE 231 CLK_USBPHY_HSE 232 CLK_SPI2S1_PLL3Q 233 CLK_SPI2S23_PLL3Q 234 CLK_SPI45_HSI 235 CLK_SPI6_HSI 236 CLK_I2C46_HSI 237 CLK_SDMMC3_PLL4P 238 CLK_USBO_USBPHY 239 CLK_ADC_CKPER 240 CLK_CEC_LSE 241 CLK_I2C12_HSI 242 CLK_I2C35_HSI 243 CLK_UART1_HSI 244 CLK_UART24_HSI 245 CLK_UART35_HSI 246 CLK_UART6_HSI 247 CLK_UART78_HSI 248 CLK_SPDIF_PLL4P 249 CLK_FDCAN_PLL4R 250 CLK_SAI1_PLL3Q 251 CLK_SAI2_PLL3Q 252 CLK_SAI3_PLL3Q 253 CLK_SAI4_PLL3Q 254 CLK_RNG1_LSI 255 CLK_RNG2_LSI 256 CLK_LPTIM1_PCLK1 257 CLK_LPTIM23_PCLK3 258 CLK_LPTIM45_LSE 259 >; 260 261 /* VCO = 1300.0 MHz => P = 650 (CPU) */ 262 pll1: st,pll@0 { 263 cfg = < 2 80 0 0 0 PQR(1,0,0) >; 264 frac = < 0x800 >; 265 }; 266 267 /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */ 268 pll2: st,pll@1 { 269 cfg = < 2 65 1 0 0 PQR(1,1,1) >; 270 frac = < 0x1400 >; 271 }; 272 273 /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */ 274 pll3: st,pll@2 { 275 cfg = < 1 33 1 16 36 PQR(1,1,1) >; 276 frac = < 0x1a04 >; 277 }; 278 279 /* VCO = 480.0 MHz => P = 120, Q = 40, R = 96 */ 280 pll4: st,pll@3 { 281 cfg = < 1 39 3 11 4 PQR(1,1,1) >; 282 }; 283}; 284