xref: /rk3399_ARM-atf/fdts/stm32mp15-pinctrl.dtsi (revision 277d6af5616b270436219733a34ded2048c98702)
1*277d6af5SYann Gautier// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2*277d6af5SYann Gautier/*
3*277d6af5SYann Gautier * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
4*277d6af5SYann Gautier * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
5*277d6af5SYann Gautier */
6*277d6af5SYann Gautier#include <dt-bindings/pinctrl/stm32-pinfunc.h>
7*277d6af5SYann Gautier
8*277d6af5SYann Gautier&pinctrl {
9*277d6af5SYann Gautier	fmc_pins_a: fmc-0 {
10*277d6af5SYann Gautier		pins1 {
11*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
12*277d6af5SYann Gautier				 <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
13*277d6af5SYann Gautier				 <STM32_PINMUX('D', 11, AF12)>, /* FMC_A16_FMC_CLE */
14*277d6af5SYann Gautier				 <STM32_PINMUX('D', 12, AF12)>, /* FMC_A17_FMC_ALE */
15*277d6af5SYann Gautier				 <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
16*277d6af5SYann Gautier				 <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
17*277d6af5SYann Gautier				 <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
18*277d6af5SYann Gautier				 <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
19*277d6af5SYann Gautier				 <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
20*277d6af5SYann Gautier				 <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
21*277d6af5SYann Gautier				 <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
22*277d6af5SYann Gautier				 <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
23*277d6af5SYann Gautier				 <STM32_PINMUX('G', 9, AF12)>; /* FMC_NE2_FMC_NCE */
24*277d6af5SYann Gautier			bias-disable;
25*277d6af5SYann Gautier			drive-push-pull;
26*277d6af5SYann Gautier			slew-rate = <1>;
27*277d6af5SYann Gautier		};
28*277d6af5SYann Gautier		pins2 {
29*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */
30*277d6af5SYann Gautier			bias-pull-up;
31*277d6af5SYann Gautier		};
32*277d6af5SYann Gautier	};
33*277d6af5SYann Gautier
34*277d6af5SYann Gautier	qspi_clk_pins_a: qspi-clk-0 {
35*277d6af5SYann Gautier		pins {
36*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
37*277d6af5SYann Gautier			bias-disable;
38*277d6af5SYann Gautier			drive-push-pull;
39*277d6af5SYann Gautier			slew-rate = <3>;
40*277d6af5SYann Gautier		};
41*277d6af5SYann Gautier	};
42*277d6af5SYann Gautier
43*277d6af5SYann Gautier	qspi_bk1_pins_a: qspi-bk1-0 {
44*277d6af5SYann Gautier		pins1 {
45*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
46*277d6af5SYann Gautier				 <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
47*277d6af5SYann Gautier				 <STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
48*277d6af5SYann Gautier				 <STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
49*277d6af5SYann Gautier			bias-disable;
50*277d6af5SYann Gautier			drive-push-pull;
51*277d6af5SYann Gautier			slew-rate = <1>;
52*277d6af5SYann Gautier		};
53*277d6af5SYann Gautier		pins2 {
54*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
55*277d6af5SYann Gautier			bias-pull-up;
56*277d6af5SYann Gautier			drive-push-pull;
57*277d6af5SYann Gautier			slew-rate = <1>;
58*277d6af5SYann Gautier		};
59*277d6af5SYann Gautier	};
60*277d6af5SYann Gautier
61*277d6af5SYann Gautier	qspi_bk2_pins_a: qspi-bk2-0 {
62*277d6af5SYann Gautier		pins1 {
63*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
64*277d6af5SYann Gautier				 <STM32_PINMUX('H', 3, AF9)>, /* QSPI_BK2_IO1 */
65*277d6af5SYann Gautier				 <STM32_PINMUX('G', 10, AF11)>, /* QSPI_BK2_IO2 */
66*277d6af5SYann Gautier				 <STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
67*277d6af5SYann Gautier			bias-disable;
68*277d6af5SYann Gautier			drive-push-pull;
69*277d6af5SYann Gautier			slew-rate = <1>;
70*277d6af5SYann Gautier		};
71*277d6af5SYann Gautier		pins2 {
72*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
73*277d6af5SYann Gautier			bias-pull-up;
74*277d6af5SYann Gautier			drive-push-pull;
75*277d6af5SYann Gautier			slew-rate = <1>;
76*277d6af5SYann Gautier		};
77*277d6af5SYann Gautier	};
78*277d6af5SYann Gautier
79*277d6af5SYann Gautier	rtc_out2_rmp_pins_a: rtc-out2-rmp-pins-0 {
80*277d6af5SYann Gautier		pins {
81*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('I', 8, ANALOG)>; /* RTC_OUT2_RMP */
82*277d6af5SYann Gautier		};
83*277d6af5SYann Gautier	};
84*277d6af5SYann Gautier
85*277d6af5SYann Gautier	sdmmc1_b4_pins_a: sdmmc1-b4-0 {
86*277d6af5SYann Gautier		pins1 {
87*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
88*277d6af5SYann Gautier				 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
89*277d6af5SYann Gautier				 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
90*277d6af5SYann Gautier				 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
91*277d6af5SYann Gautier				 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
92*277d6af5SYann Gautier			slew-rate = <1>;
93*277d6af5SYann Gautier			drive-push-pull;
94*277d6af5SYann Gautier			bias-disable;
95*277d6af5SYann Gautier		};
96*277d6af5SYann Gautier		pins2 {
97*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
98*277d6af5SYann Gautier			slew-rate = <2>;
99*277d6af5SYann Gautier			drive-push-pull;
100*277d6af5SYann Gautier			bias-disable;
101*277d6af5SYann Gautier		};
102*277d6af5SYann Gautier	};
103*277d6af5SYann Gautier
104*277d6af5SYann Gautier	sdmmc1_dir_pins_a: sdmmc1-dir-0 {
105*277d6af5SYann Gautier		pins1 {
106*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
107*277d6af5SYann Gautier				 <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
108*277d6af5SYann Gautier				 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
109*277d6af5SYann Gautier			slew-rate = <1>;
110*277d6af5SYann Gautier			drive-push-pull;
111*277d6af5SYann Gautier			bias-pull-up;
112*277d6af5SYann Gautier		};
113*277d6af5SYann Gautier		pins2{
114*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
115*277d6af5SYann Gautier			bias-pull-up;
116*277d6af5SYann Gautier		};
117*277d6af5SYann Gautier	};
118*277d6af5SYann Gautier
119*277d6af5SYann Gautier	sdmmc2_b4_pins_a: sdmmc2-b4-0 {
120*277d6af5SYann Gautier		pins1 {
121*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
122*277d6af5SYann Gautier				 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
123*277d6af5SYann Gautier				 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
124*277d6af5SYann Gautier				 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
125*277d6af5SYann Gautier				 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
126*277d6af5SYann Gautier			slew-rate = <1>;
127*277d6af5SYann Gautier			drive-push-pull;
128*277d6af5SYann Gautier			bias-pull-up;
129*277d6af5SYann Gautier		};
130*277d6af5SYann Gautier		pins2 {
131*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
132*277d6af5SYann Gautier			slew-rate = <2>;
133*277d6af5SYann Gautier			drive-push-pull;
134*277d6af5SYann Gautier			bias-pull-up;
135*277d6af5SYann Gautier		};
136*277d6af5SYann Gautier	};
137*277d6af5SYann Gautier
138*277d6af5SYann Gautier	sdmmc2_b4_pins_b: sdmmc2-b4-1 {
139*277d6af5SYann Gautier		pins1 {
140*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
141*277d6af5SYann Gautier				 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
142*277d6af5SYann Gautier				 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
143*277d6af5SYann Gautier				 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
144*277d6af5SYann Gautier				 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
145*277d6af5SYann Gautier			slew-rate = <1>;
146*277d6af5SYann Gautier			drive-push-pull;
147*277d6af5SYann Gautier			bias-disable;
148*277d6af5SYann Gautier		};
149*277d6af5SYann Gautier		pins2 {
150*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
151*277d6af5SYann Gautier			slew-rate = <2>;
152*277d6af5SYann Gautier			drive-push-pull;
153*277d6af5SYann Gautier			bias-disable;
154*277d6af5SYann Gautier		};
155*277d6af5SYann Gautier	};
156*277d6af5SYann Gautier
157*277d6af5SYann Gautier	sdmmc2_d47_pins_a: sdmmc2-d47-0 {
158*277d6af5SYann Gautier		pins {
159*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
160*277d6af5SYann Gautier				 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
161*277d6af5SYann Gautier				 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
162*277d6af5SYann Gautier				 <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */
163*277d6af5SYann Gautier			slew-rate = <1>;
164*277d6af5SYann Gautier			drive-push-pull;
165*277d6af5SYann Gautier			bias-pull-up;
166*277d6af5SYann Gautier		};
167*277d6af5SYann Gautier	};
168*277d6af5SYann Gautier
169*277d6af5SYann Gautier	uart4_pins_a: uart4-0 {
170*277d6af5SYann Gautier		pins1 {
171*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
172*277d6af5SYann Gautier			bias-disable;
173*277d6af5SYann Gautier			drive-push-pull;
174*277d6af5SYann Gautier			slew-rate = <0>;
175*277d6af5SYann Gautier		};
176*277d6af5SYann Gautier		pins2 {
177*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
178*277d6af5SYann Gautier			bias-disable;
179*277d6af5SYann Gautier		};
180*277d6af5SYann Gautier	};
181*277d6af5SYann Gautier
182*277d6af5SYann Gautier	uart4_pins_b: uart4-1 {
183*277d6af5SYann Gautier		pins1 {
184*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
185*277d6af5SYann Gautier			bias-disable;
186*277d6af5SYann Gautier			drive-push-pull;
187*277d6af5SYann Gautier			slew-rate = <0>;
188*277d6af5SYann Gautier		};
189*277d6af5SYann Gautier		pins2 {
190*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
191*277d6af5SYann Gautier			bias-disable;
192*277d6af5SYann Gautier		};
193*277d6af5SYann Gautier	};
194*277d6af5SYann Gautier
195*277d6af5SYann Gautier	uart7_pins_a: uart7-0 {
196*277d6af5SYann Gautier		pins1 {
197*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART4_TX */
198*277d6af5SYann Gautier			bias-disable;
199*277d6af5SYann Gautier			drive-push-pull;
200*277d6af5SYann Gautier			slew-rate = <0>;
201*277d6af5SYann Gautier		};
202*277d6af5SYann Gautier		pins2 {
203*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART4_RX */
204*277d6af5SYann Gautier				 <STM32_PINMUX('E', 10, AF7)>, /* UART4_CTS */
205*277d6af5SYann Gautier				 <STM32_PINMUX('E', 9, AF7)>; /* UART4_RTS */
206*277d6af5SYann Gautier			bias-disable;
207*277d6af5SYann Gautier		};
208*277d6af5SYann Gautier	};
209*277d6af5SYann Gautier
210*277d6af5SYann Gautier	uart7_pins_b: uart7-1 {
211*277d6af5SYann Gautier		pins1 {
212*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('E', 8, AF7)>; /* USART7_TX */
213*277d6af5SYann Gautier			bias-disable;
214*277d6af5SYann Gautier			drive-push-pull;
215*277d6af5SYann Gautier			slew-rate = <0>;
216*277d6af5SYann Gautier		};
217*277d6af5SYann Gautier		pins2 {
218*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('E', 7, AF7)>; /* USART7_RX */
219*277d6af5SYann Gautier			bias-disable;
220*277d6af5SYann Gautier		};
221*277d6af5SYann Gautier	};
222*277d6af5SYann Gautier
223*277d6af5SYann Gautier	usart2_pins_a: usart2-0 {
224*277d6af5SYann Gautier		pins1 {
225*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('D', 5, AF7)>, /* USART2_TX */
226*277d6af5SYann Gautier				 <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
227*277d6af5SYann Gautier			bias-disable;
228*277d6af5SYann Gautier			drive-push-pull;
229*277d6af5SYann Gautier			slew-rate = <3>;
230*277d6af5SYann Gautier		};
231*277d6af5SYann Gautier		pins2 {
232*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
233*277d6af5SYann Gautier				 <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
234*277d6af5SYann Gautier			bias-disable;
235*277d6af5SYann Gautier		};
236*277d6af5SYann Gautier	};
237*277d6af5SYann Gautier
238*277d6af5SYann Gautier	usart3_pins_a: usart3-0 {
239*277d6af5SYann Gautier		pins1 {
240*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
241*277d6af5SYann Gautier				 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
242*277d6af5SYann Gautier			bias-disable;
243*277d6af5SYann Gautier			drive-push-pull;
244*277d6af5SYann Gautier			slew-rate = <0>;
245*277d6af5SYann Gautier		};
246*277d6af5SYann Gautier		pins2 {
247*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
248*277d6af5SYann Gautier				 <STM32_PINMUX('I', 10, AF8)>; /* USART3_CTS_NSS */
249*277d6af5SYann Gautier			bias-disable;
250*277d6af5SYann Gautier		};
251*277d6af5SYann Gautier	};
252*277d6af5SYann Gautier
253*277d6af5SYann Gautier	usart3_pins_b: usart3-1 {
254*277d6af5SYann Gautier		pins1 {
255*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
256*277d6af5SYann Gautier				 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
257*277d6af5SYann Gautier			bias-disable;
258*277d6af5SYann Gautier			drive-push-pull;
259*277d6af5SYann Gautier			slew-rate = <0>;
260*277d6af5SYann Gautier		};
261*277d6af5SYann Gautier		pins2 {
262*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
263*277d6af5SYann Gautier				 <STM32_PINMUX('B', 13, AF7)>; /* USART3_CTS_NSS */
264*277d6af5SYann Gautier			bias-disable;
265*277d6af5SYann Gautier		};
266*277d6af5SYann Gautier	};
267*277d6af5SYann Gautier
268*277d6af5SYann Gautier	usbotg_hs_pins_a: usbotg_hs-0 {
269*277d6af5SYann Gautier		pins {
270*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
271*277d6af5SYann Gautier		};
272*277d6af5SYann Gautier	};
273*277d6af5SYann Gautier
274*277d6af5SYann Gautier	usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 {
275*277d6af5SYann Gautier		pins {
276*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* OTG_FS_DM */
277*277d6af5SYann Gautier				 <STM32_PINMUX('A', 12, ANALOG)>; /* OTG_FS_DP */
278*277d6af5SYann Gautier		};
279*277d6af5SYann Gautier	};
280*277d6af5SYann Gautier};
281*277d6af5SYann Gautier
282*277d6af5SYann Gautier&pinctrl_z {
283*277d6af5SYann Gautier	i2c4_pins_a: i2c4-0 {
284*277d6af5SYann Gautier		pins {
285*277d6af5SYann Gautier			pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
286*277d6af5SYann Gautier				 <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
287*277d6af5SYann Gautier			bias-disable;
288*277d6af5SYann Gautier			drive-open-drain;
289*277d6af5SYann Gautier			slew-rate = <0>;
290*277d6af5SYann Gautier		};
291*277d6af5SYann Gautier	};
292*277d6af5SYann Gautier};
293