1/* 2 * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7/dts-v1/; 8 9/memreserve/ 0x80000000 0x00010000; 10 11/ { 12}; 13 14/ { 15 model = "FVP Foundation"; 16 compatible = "arm,fvp-base", "arm,vexpress"; 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; 19 #size-cells = <2>; 20 21 chosen { }; 22 23 aliases { 24 serial0 = &v2m_serial0; 25 serial1 = &v2m_serial1; 26 serial2 = &v2m_serial2; 27 serial3 = &v2m_serial3; 28 }; 29 30 psci { 31 compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci"; 32 method = "smc"; 33 cpu_suspend = <0xc4000001>; 34 cpu_off = <0x84000002>; 35 cpu_on = <0xc4000003>; 36 sys_poweroff = <0x84000008>; 37 sys_reset = <0x84000009>; 38 max-pwr-lvl = <2>; 39 }; 40 41 cpus { 42 #address-cells = <2>; 43 #size-cells = <0>; 44 45 cpu-map { 46 cluster0 { 47 core0 { 48 cpu = <&CPU0>; 49 }; 50 core1 { 51 cpu = <&CPU1>; 52 }; 53 core2 { 54 cpu = <&CPU2>; 55 }; 56 core3 { 57 cpu = <&CPU3>; 58 }; 59 }; 60 }; 61 62 idle-states { 63 entry-method = "arm,psci"; 64 65 CPU_SLEEP_0: cpu-sleep-0 { 66 compatible = "arm,idle-state"; 67 local-timer-stop; 68 arm,psci-suspend-param = <0x0010000>; 69 entry-latency-us = <40>; 70 exit-latency-us = <100>; 71 min-residency-us = <150>; 72 }; 73 74 CLUSTER_SLEEP_0: cluster-sleep-0 { 75 compatible = "arm,idle-state"; 76 local-timer-stop; 77 arm,psci-suspend-param = <0x1010000>; 78 entry-latency-us = <500>; 79 exit-latency-us = <1000>; 80 min-residency-us = <2500>; 81 }; 82 }; 83 84 CPU0:cpu@0 { 85 device_type = "cpu"; 86 compatible = "arm,armv8"; 87 reg = <0x0 0x0>; 88 enable-method = "psci"; 89 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 90 next-level-cache = <&L2_0>; 91 }; 92 93 CPU1:cpu@1 { 94 device_type = "cpu"; 95 compatible = "arm,armv8"; 96 reg = <0x0 0x1>; 97 enable-method = "psci"; 98 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 99 next-level-cache = <&L2_0>; 100 }; 101 102 CPU2:cpu@2 { 103 device_type = "cpu"; 104 compatible = "arm,armv8"; 105 reg = <0x0 0x2>; 106 enable-method = "psci"; 107 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 108 next-level-cache = <&L2_0>; 109 }; 110 111 CPU3:cpu@3 { 112 device_type = "cpu"; 113 compatible = "arm,armv8"; 114 reg = <0x0 0x3>; 115 enable-method = "psci"; 116 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 117 next-level-cache = <&L2_0>; 118 }; 119 120 L2_0: l2-cache0 { 121 compatible = "cache"; 122 }; 123 }; 124 125 memory@80000000 { 126 device_type = "memory"; 127 reg = <0x00000000 0x80000000 0 0x7F000000>, 128 <0x00000008 0x80000000 0 0x80000000>; 129 }; 130 131 gic: interrupt-controller@2f000000 { 132 compatible = "arm,gic-v3"; 133 #interrupt-cells = <3>; 134 #address-cells = <2>; 135 #size-cells = <2>; 136 ranges; 137 interrupt-controller; 138 reg = <0x0 0x2f000000 0 0x10000>, // GICD 139 <0x0 0x2f100000 0 0x200000>, // GICR 140 <0x0 0x2c000000 0 0x2000>, // GICC 141 <0x0 0x2c010000 0 0x2000>, // GICH 142 <0x0 0x2c02f000 0 0x2000>; // GICV 143 interrupts = <1 9 4>; 144 145 its: its@2f020000 { 146 compatible = "arm,gic-v3-its"; 147 msi-controller; 148 reg = <0x0 0x2f020000 0x0 0x20000>; // GITS 149 }; 150 }; 151 152 timer { 153 compatible = "arm,armv8-timer"; 154 interrupts = <1 13 0xff01>, 155 <1 14 0xff01>, 156 <1 11 0xff01>, 157 <1 10 0xff01>; 158 clock-frequency = <100000000>; 159 }; 160 161 timer@2a810000 { 162 compatible = "arm,armv7-timer-mem"; 163 reg = <0x0 0x2a810000 0x0 0x10000>; 164 clock-frequency = <100000000>; 165 #address-cells = <2>; 166 #size-cells = <2>; 167 ranges; 168 frame@2a830000 { 169 frame-number = <1>; 170 interrupts = <0 26 4>; 171 reg = <0x0 0x2a830000 0x0 0x10000>; 172 }; 173 }; 174 175 pmu { 176 compatible = "arm,armv8-pmuv3"; 177 interrupts = <0 60 4>, 178 <0 61 4>, 179 <0 62 4>, 180 <0 63 4>; 181 }; 182 183 smb { 184 compatible = "simple-bus"; 185 186 #address-cells = <2>; 187 #size-cells = <1>; 188 ranges = <0 0 0 0x08000000 0x04000000>, 189 <1 0 0 0x14000000 0x04000000>, 190 <2 0 0 0x18000000 0x04000000>, 191 <3 0 0 0x1c000000 0x04000000>, 192 <4 0 0 0x0c000000 0x04000000>, 193 <5 0 0 0x10000000 0x04000000>; 194 195 #include "fvp-foundation-motherboard.dtsi" 196 }; 197}; 198