1 /* 2 * Copyright (c) 2021-2025, Renesas Electronics Corporation. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <stddef.h> 8 #include <stdint.h> 9 10 #include <drivers/console.h> 11 #include <lib/mmio.h> 12 #include <lib/utils_def.h> 13 #include "scif.h" 14 15 #include "rcar_def.h" 16 17 /* RST */ 18 #define RST_BASE (0xE6160000UL + (RCAR_DOMAIN * 0x4000UL)) 19 #define RST_MODEMR0 RST_BASE 20 #define RST_MODEMR1 (RST_BASE + 4UL) 21 #define RST_MODEMR0_MD31 BIT(31) 22 #define RST_MODEMR1_MD32 BIT(0) 23 24 /* SCIF/HSCIF */ 25 #define SCIF0_BASE 0xE6E60000UL 26 #define SCIF3_BASE 0xE6C50000UL 27 #define HSCIF0_BASE 0xE6540000UL 28 29 /* SCIF */ 30 #if (RCAR_LSI == RCAR_S4) /* S4 */ 31 #define SCIF_BASE SCIF3_BASE 32 #else 33 #define SCIF_BASE SCIF0_BASE 34 #endif 35 #define SCIF_SCFTDR (SCIF_BASE + 0x000CU) /* 8 Transmit FIFO data register */ 36 #define SCIF_SCFSR (SCIF_BASE + 0x0010U) /* 16 Serial status register */ 37 38 /* HSCIF */ 39 #define HSCIF_BASE HSCIF0_BASE 40 #define HSCIF_HSFTDR (HSCIF_BASE + 0x000CU) /* 8 Transmit FIFO data register */ 41 #define HSCIF_HSFSR (HSCIF_BASE + 0x0010U) /* 16 Serial status register */ 42 43 /* Mode */ 44 #define MODEMR_SCIF_DLMODE 0U 45 #define MODEMR_HSCIF_DLMODE_921600 1U 46 #define MODEMR_HSCIF_DLMODE_1843200 2U 47 #define MODEMR_HSCIF_DLMODE_3000000 3U 48 49 int console_rcar_init(uintptr_t base_addr, uint32_t uart_clk, 50 uint32_t baud_rate) 51 { 52 uint32_t modemr; 53 54 modemr = ((mmio_read_32(RST_MODEMR0) & RST_MODEMR0_MD31) >> 31U) | 55 ((mmio_read_32(RST_MODEMR1) & RST_MODEMR1_MD32) << 1U); 56 57 if (modemr == MODEMR_HSCIF_DLMODE_3000000 || 58 modemr == MODEMR_HSCIF_DLMODE_1843200 || 59 modemr == MODEMR_HSCIF_DLMODE_921600) { 60 scif_console_set_regs(HSCIF_HSFSR, HSCIF_HSFTDR); 61 } else { 62 scif_console_set_regs(SCIF_SCFSR, SCIF_SCFTDR); 63 } 64 65 return 1; 66 } 67